Delay in copying Linuxbios to ram

[SONE Takeshi]

On Fri, Apr 25, 2003 at 06:55:37PM -0600, Eric W. Biederman wrote:
> > > In cpu/p6/earlymtrr.inc, 0xf0000-0xfffff is left uncached.
> > > (Only 0-640KB is cached, 640KB-1M is uncached)
> > > I will try adding code there to set fixed MTRR for 0xf0000-0xfffff
> > > WP caching.
> > > It should be harmless for other boards that do not need this,
> > > what do you think?
> > >
> > 
> > Not sure.  Need to see if the RAM is turned on for this region later after the
> > C-code starts, if so, then the cache memory type may have to be changed from WP
> > to normal.

I tried it anyway and it worked great.
Now I can't see anything between 'Copying LinuxBIOS to ram' and
IDE loading message because it's too fast! 

> The generic code should handle this.  I believe all of the mtrrs are rebuilt.

I think it's rebuilt in mtrr.c.

My modification is below.
-- 
Takeshi



Index: earlymtrr.inc
===================================================================
RCS file: /cvsroot/freebios/freebios/src/cpu/p6/earlymtrr.inc,v
retrieving revision 1.4
diff -u -r1.4 earlymtrr.inc
--- earlymtrr.inc	8 Aug 2001 02:45:09 -0000	1.4
+++ earlymtrr.inc	28 Apr 2003 18:17:51 -0000
@@ -35,6 +35,22 @@
 	movl	$0x06060606, %edx
 	movl	$0x06060606, %eax
 	wrmsr
+
+#if _ROMBASE < 0x100000
+	/* enable Write Protect Cache for 0x000f0000-0x000fffff */
+	movl	$MTRRfix4K_F0000_MSR, %ecx
+	rdmsr
+	movl	$0x05050505, %edx
+	movl	$0x05050505, %eax
+	wrmsr
+
+	movl	$MTRRfix4K_F8000_MSR, %ecx
+	rdmsr
+	movl	$0x05050505, %edx
+	movl	$0x05050505, %eax
+	wrmsr
+#endif /* _ROMBASE < 0x100000 */
+
 #endif /* MEMORY_HOLE */
 
 set_var_mtrr: