SiS630 Software Watchdog Timer

Eric W. Biederman ebiederman at
Mon Mar 17 22:07:00 CET 2003

Steve Gehlbach <steve at> writes:

> Eric W. Biederman wrote:
> > Steve Gehlbach <steve at> writes:
> >
> >>Ronald G. Minnich wrote:
> >>How about using XIP_ROM_SIZE and XIP_ROM_BASE; seems to setup WP caching on
> >>variable MTRR 0x203 (mem type=5).  Or does this have other effects; maybe use
> a
> >>different option with same code?
> > XIP is short for Execute in place.  And that is exactly what it is designed
> > for.
> >
> Fair enough, so we'll use 0x204,5 and separate code.  I assume it will speed
> things up, have to test it in a day or so.  As it is, the 5 sec delay makes
> compression hard to live with.

Error.  Communications failure.

I meant this situation is exactly what it is designed for.

> I am also assuming the Via C3 has the variable MTRRs, that may not be a correct
> assumption.  The Intel book says P6 family.

Very good question what does the C3 have?  I recall the strange clones
not following intels variable mtrrs.


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