=?gb2312?b?tPC4tA==?=: coherent hypertransport enumeration on opteron

Eric W. Biederman ebiederman at lnxi.com
Tue Jun 24 10:49:00 CEST 2003


YhLu <YhLu at tyan.com> writes:

> Eric,
> 
> After update raminit.c now MB can boot into linuxbios.
> 
> The s2880 has six memory slot: 4 for CPU0 ,and 2 for CPU 1.
> I can only init 4 for CPU0. I have tried:
> #cp raminit.c raminit1.c
> and rename all function in the raminit1.c to xxxxx_1
> copy genric_sdram.c to generic_sdram1.c in the sdram dir.
> Also add the calling function in auto1.c. and can not pass the test.

I am not certain which test is failing.  

The only test that really matters is memtest86.  The builtin test
of LinuxBIOS are just enough to see if the memory has been seriously
misconfigured.

> Any advice on init RAM on second cpu northbridge?

That is going to be a challenge.  I am pretty certain we can reuse
much of the code.  But it needs to get cleaned up first.  

I am about a day or two out before I am satisfied with the memory
initialization code I am working on.  I was starting to make progress
and then I got distracted by the lack of support for structures in
memory by romcc, so I have just finished implementing that.  They are
needed for some lookup tables based on memory speed.

> I have try to enable SMP support in LinuxBIOS and can not compile it
> through.
> Miss severl function. (Spin for Only CPU and start second CPU.S). When do
> you plan to add it? Or can tell me your idea and I can add it right now.

I don't think it is going to change much from the freebios tree, although
there is a little of that in my wish list.  If there are some missing functions
it should be possible to get them out of the freebios tree.  And a
patch doing that would be appreciated.

If I read your boot log properly you have enabled ecc support for you memory.
The memory timings you are using are not solid, and you are getting a machine
check because the memory is not stable.

Eric




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