no docipl after make

Tobias Kloss tobby at
Mon Jun 23 16:48:01 CEST 2003


i have an old gigabyte board with the 430TX chipset on it. For 
configuration i used the example from 
src/mainborads/digitallogic/smartcore-p5/config.example, because it uses 
the 430tx as northbridge and the piix4 as southbridge as my board does.
After running the python program, i started to make a romimage. But i 
don't get the docipl file after make finshed. What can i do?

Tobias Kloss

This is my lspci output:
00:00.0 Host bridge: Intel Corp. 430TX - 82439TX MTXC (rev 01)
00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 01)
00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01)
00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01)
00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 01)
00:08.0 VGA compatible controller: Matrox Graphics, Inc. MGA 2164W 
[Millennium II]
00:0a.0 Ethernet controller: 3Com Corporation 3c905B 100BaseTX [Cyclone] 
(rev 24)

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