DDR SDRAM Initialization.

Ronald G. Minnich rminnich at lanl.gov
Thu Jan 16 15:49:01 CET 2003


On 16 Jan 2003, Eric W. Biederman wrote:

> It is performing a memory read.   A memory read in intel chipsets
> when the command register is set properly causes commands to be sent
> to memory.  Reads seem to work a little bit more reliably than writes
> in my experience.
> 

except on 430TX, where due to a seeming bug in the chipset you have to 
write :-)

ron




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