Fixes for Tyan s2880

Eric W. Biederman ebiederman at lnxi.com
Mon Aug 4 19:39:01 CEST 2003


YhLu <YhLu at tyan.com> writes:

> Eric,
> 
> It works on 12G too.
> 
> Setting variable MTRR 0, base:    0MB, range: 2048MB, type WB
> Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
> Setting variable MTRR 2, base: 3072MB, range:  512MB, type WB
> Setting variable MTRR 3, base: 3584MB, range:  256MB, type WB
> Setting variable MTRR 4, base: 4096MB, range: 4096MB, type WB
> Setting variable MTRR 5, base: 8192MB, range: 4096MB, type WB
> 
> But I think you need to optimize mtrr.c now, otherwise it may not work with
> arima Hadama. 8*2=16G, will use out MTRR.

I agree we are very close, to that point.  And it does look like
 
However I suspect the 16G case to look like:

> Setting variable MTRR 0, base:    0MB, range: 2048MB, type WB
> Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
> Setting variable MTRR 2, base: 3072MB, range:  512MB, type WB
> Setting variable MTRR 3, base: 3584MB, range:  256MB, type WB
> Setting variable MTRR 4, base: 4096MB, range: 4096MB, type WB
> Setting variable MTRR 5, base: 8192MB, range: 8192MB, type WB

I hadn't realized we would start using > 1 mtrr after 4GB.

The challenge is that the kernel really need to be shown how to handle
overlapping mtrrs.  That would let me handle the first 4 mtrrs (0-3) with
just two mtrrs, fairly reliably.

Eric




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