Error ...

steven james pyro at
Fri Apr 18 18:06:01 CEST 2003


If you're using the linuxbios_reset (kernel linuxbios patch), you can have
reset write 0x0e to 0xcf9. That will do a 3 second poweroff instead of a
simple reset. That should avoid the issue at least.


On 18 Apr 2003, Eric W. Biederman wrote:

> Jim Garlick <garlick at> writes:
> > Sounds very similar to a problem observed on the SuperMicro P4DPR/DPE which
> > has the same winbond sensor chip.  The solution was to tell lm_sensors to
> > access the Winbond via ISA rather than I2C.
> > 
> > I think there is also some code in the p4dpr/p4dpe linuxbios port to notice
> > the memory initialization problem and work around it (e.g. wait a while
> > and reset?)  The details have faded but you might check the code.
> So the details.  On Intels ICH3 southbridge there is an smbus/i2c controller
> that when it sees invalid on the bus it locks up.  But it only sees invalid
> data when you are actually using the bus.  Using lm_sensors just increases
> the probability that the smbus controller will lock up.
> At which point a reboot will fail because SPD information cannot be
> read over the smbus, leading the LinuxBIOS to think you have no RAM.
> To the best of my knowledge there is no fix.  This is just something
> that needs to be avoided.
> Eric
> _______________________________________________
> Linuxbios mailing list
> Linuxbios at

-------------------------steven james, director of research, linux labs
... ........ ..... ....                    230 peachtree st nw ste 2701
the original linux labs                    30303
      -since 1995                    
                                   office 404.577.7747 fax 404.577.7743

More information about the coreboot mailing list