more news on the smartcore P3 and etherboot failures.

Gregg C Levine hansolofalcon at worldnet.att.net
Tue Sep 24 18:54:03 CEST 2002


Hello from Gregg C Levine
Okay. That I will agree on. Indeed there are some bugs inside that
thing. However I was referring to the term you used, "northbridge
manual". Is there actually a manual for the particular chipsets you were
discussing or insulting in this thread? If it’s a 440 family part, I
think I know where to find it.
-------------------
Gregg C Levine hansolofalcon at worldnet.att.net
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> -----Original Message-----
> From: linuxbios-admin at clustermatic.org [mailto:linuxbios-
> admin at clustermatic.org] On Behalf Of Ronald G Minnich
> Sent: Tuesday, September 24, 2002 10:18 AM
> To: Gregg C Levine
> Cc: Linuxbios
> Subject: RE: more news on the smartcore P3 and etherboot failures.
> 
> On Tue, 24 Sep 2002, Gregg C Levine wrote:
> 
> > "northbridge manual"? You've lost me there, Ron. Please explain. I
know,
> > (I think), which part of the PCI layout, is which, but that
reference
> > eludes me.
> 
> 
> northbridge is the common term for "that big buggy chip which connects
> CPUs to memory and PCI bus"
> 
> ron
> 
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