more news on the smartcore P3 and etherboot failures.

Ronald G Minnich rminnich at lanl.gov
Tue Sep 24 10:06:01 CEST 2002


On Tue, 24 Sep 2002, Gregg C Levine wrote:

> "northbridge manual"? You've lost me there, Ron. Please explain. I know,
> (I think), which part of the PCI layout, is which, but that reference
> eludes me.


northbridge is the common term for "that big buggy chip which connects
CPUs to memory and PCI bus"

ron




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