more news on the smartcore P3 and etherboot failures.

Gregg C Levine hansolofalcon at worldnet.att.net
Tue Sep 24 00:27:00 CEST 2002


Hello again from Gregg C Levine
"northbridge manual"? You've lost me there, Ron. Please explain. I know,
(I think), which part of the PCI layout, is which, but that reference
eludes me. 
-------------------
Gregg C Levine hansolofalcon at worldnet.att.net
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> -----Original Message-----
> From: linuxbios-admin at clustermatic.org [mailto:linuxbios-
> admin at clustermatic.org] On Behalf Of Ronald G Minnich
> Sent: Monday, September 23, 2002 6:07 PM
> To: Steve M. Gehlbach
> Cc: linuxbios at clustermatic.org
> Subject: RE: more news on the smartcore P3 and etherboot failures.
> 
> On Mon, 23 Sep 2002, Steve M. Gehlbach wrote:
> 
> > is this all ports, just bridge registers, or external I/O (ISA or
PCI)?  I
> > agree that it sounds like a timing problem, but it depends on which
I/O
> > ports.
> 
> it is PCI ports. I don't seem to be able to inw() from any PCI ports
but
> outw is fine.
> 
> I'm going to check the northbridge manual for hints. This is the first
> 440bx we have seen this problem on.
> 
> ron
> 
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