more news on the smartcore P3 and etherboot failures.
Steve M. Gehlbach
steve at nexpath.com
Mon Sep 23 17:18:01 CEST 2002
> > > So, back to the original issue: inw operations acting wrong. The first
> > > inw() always reads 0, the seconds reads what looks like the
> right value.
> > > Anybody have an idea on what kind of north/south
> configuration problems
> > > could make this happen?
is this all ports, just bridge registers, or external I/O (ISA or PCI)? I
agree that it sounds like a timing problem, but it depends on which I/O
More information about the coreboot