[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus: Touchpad I2C CLK (405.25KHz)over spec(＜400KHz)

[Peichao Li (Code Review)]

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/28747


Change subject: mb/google/octopus: Touchpad I2C CLK (405.25KHz)over spec(＜400KHz)
......................................................................

mb/google/octopus: Touchpad I2C CLK (405.25KHz)over spec(＜400KHz)

Need to tune I2C bus 6 clock frequency under the 400KHz

Bug=116543001
TEST=flash coreboot to the DUT and measure I2C bus 6 clock
frequency whether arrive to 399.1KHz

Change-Id: I95b535a6b429fc34961a4953004a1c51e53a9be6
Signed-off-by: Peichao.Wang <peichao.wang at bitland.corp-partner.google.com>
---
M src/mainboard/google/octopus/variants/phaser/overridetree.cb
1 file changed, 41 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/28747/1

diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
index f2824d8..2f6915e 100644
--- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
@@ -1,5 +1,46 @@
 chip soc/intel/apollolake
 
+	# Intel Common SoC Config
+	#+-------------------+---------------------------+
+	#| Field             |  Value                    |
+	#+-------------------+---------------------------+
+	#| GSPI0             | cr50 TPM. Early init is   |
+	#|                   | required to set up a BAR  |
+	#|                   | for TPM communication     |
+	#|                   | before memory is up       |
+	#| I2C0              | Digitizer                 |
+	#| I2C5              | Audio                     |
+	#| I2C6              | Trackpad                  |
+	#| I2C7              | Touchscreen               |
+	#+-------------------+---------------------------+
+	register "common_soc_config" = "{
+		.gspi[0] = {
+			.speed_mhz = 1,
+			.early_init = 1,
+		},
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 152,
+			.fall_time_ns = 30,
+		},
+		.i2c[5] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 104,
+			.fall_time_ns = 52,
+		},
+		.i2c[6] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 66,
+			.fall_time_ns = 90,
+			.data_hold_time_ns = 350,
+		},
+		.i2c[7] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 76,
+			.fall_time_ns = 164,
+		},
+	}"
+
 	device domain 0 on
 		device pci 16.0 on
 			chip drivers/i2c/hid

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I95b535a6b429fc34961a4953004a1c51e53a9be6
Gerrit-Change-Number: 28747
Gerrit-PatchSet: 1
Gerrit-Owner: Peichao Li <peichao.wang at bitland.corp-partner.google.com>
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