[coreboot-gerrit] Change in coreboot[master]: skylake, kabylake: Add support to set eMMC tuning param from dev tree
Duncan Laurie (Code Review)
gerrit at coreboot.org
Sat Sep 22 02:41:49 CEST 2018
Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/28274 )
Change subject: skylake,kabylake: Add support to set eMMC tuning param from dev tree
......................................................................
skylake,kabylake: Add support to set eMMC tuning param from dev tree
Add support to set eMMC tuning params from the device tree so that it
can be configured per board.
BUG=b:112718426,b:112690628
BRANCH=none
TEST=Build nocturne image and checked values passed in dev tree is set
by FSP.
Change-Id: Ic71934dce9a1c380a057e579ca3fda41983b9385
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati at intel.com>
Reviewed-on: https://review.coreboot.org/28274
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao at intel.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Reviewed-by: Nick Vaccaro <nvaccaro at google.com>
---
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
2 files changed, 12 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Philipp Deppenwiese: Looks good to me, but someone else must approve
Lijian Zhao: Looks good to me, but someone else must approve
Nick Vaccaro: Looks good to me, approved
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 5bf3931..b1ffcb2 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -291,6 +291,9 @@
u8 ScsEmmcEnabled;
u8 ScsEmmcHs400Enabled;
u8 ScsSdCardEnabled;
+ u8 EmmcHs400DllNeed;
+ u8 ScsEmmcHs400RxStrobeDll1;
+ u8 ScsEmmcHs400TxDataDll;
u8 PttSwitch;
u8 HeciTimeouts;
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index d5f5433..c2c0745 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -336,6 +336,15 @@
params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
params->ScsSdCardEnabled = config->ScsSdCardEnabled;
+ if (!!params->ScsEmmcHs400Enabled && !!config->EmmcHs400DllNeed) {
+ params->PchScsEmmcHs400DllDataValid =
+ !!config->EmmcHs400DllNeed;
+ params->PchScsEmmcHs400RxStrobeDll1 =
+ config->ScsEmmcHs400RxStrobeDll1;
+ params->PchScsEmmcHs400TxDataDll =
+ config->ScsEmmcHs400TxDataDll;
+ }
+
/* If ISH is enabled, enable ISH elements */
dev = dev_find_slot(0, PCH_DEVFN_ISH);
if (dev)
--
To view, visit https://review.coreboot.org/28274
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Ic71934dce9a1c380a057e579ca3fda41983b9385
Gerrit-Change-Number: 28274
Gerrit-PatchSet: 2
Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro at google.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180922/9f9d89fa/attachment.html>
More information about the coreboot-gerrit
mailing list