[coreboot-gerrit] Change in coreboot[master]: fsp_broadwell_de: Add fixed VT-d MMIO range to the resources

[Werner Zeh (Code Review)]

Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/28672


Change subject: fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
......................................................................

fsp_broadwell_de: Add fixed VT-d MMIO range to the resources

FSP initializes the VT-d feature on Broadwell-DE and assigns an
address space to the MMIO range. coreboots resource allocator needs to
be aware of this fixed resource as otherwise the address can be assigned
to a different PCI device. In this case addresses are overlapped and the
VT-d range is not accessible any more.

To deal with it the right way add a fixed MMIO resource to the resources
list if VT-d BAR is enabled.

Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098
Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
---
M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
M src/soc/intel/fsp_broadwell_de/vtd.c
2 files changed, 11 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/28672/1

diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
index dc1ec19..670a68f 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
@@ -20,6 +20,7 @@
 
 #define VTBAR_OFFSET		0x180
 #define VTBAR_MASK		0xffffe000
+#define VTBAR_SIZE		0x2000
 
 #define SMM_FEATURE_CONTROL	0x58
 #define  SMM_CPU_SAVE_EN	(1 << 1)
diff --git a/src/soc/intel/fsp_broadwell_de/vtd.c b/src/soc/intel/fsp_broadwell_de/vtd.c
index eccfdfb..9fb46c1 100644
--- a/src/soc/intel/fsp_broadwell_de/vtd.c
+++ b/src/soc/intel/fsp_broadwell_de/vtd.c
@@ -20,12 +20,22 @@
 #include <device/pci_ids.h>
 #include <soc/pci_devs.h>
 #include <soc/acpi.h>
+#include <soc/broadwell_de.h>
 
 
 static void vtd_read_resources(struct device *dev)
 {
+	uint32_t vtbar;
+
 	/* Call the normal read_resources */
 	pci_dev_read_resources(dev);
+	/* Add fixed MMIO resource for VT-d which was set up by the FSP. */
+	vtbar = pci_read_config32(dev, VTBAR_OFFSET);
+	/* Make sure VT-d is enabled before adding the resource. */
+	if (vtbar & 0x01) {
+		mmio_resource(dev, VTBAR_OFFSET,
+				(vtbar & VTBAR_MASK) >> 10, VTBAR_SIZE >> 10);
+	}
 }
 
 static struct device_operations vtd_ops = {

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098
Gerrit-Change-Number: 28672
Gerrit-PatchSet: 1
Gerrit-Owner: Werner Zeh <werner.zeh at siemens.com>
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