[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variants/nocturne: Update DPTF settings
Puthikorn Voravootivat (Code Review)
gerrit at coreboot.org
Wed Sep 19 02:36:09 CEST 2018
Puthikorn Voravootivat has uploaded this change for review. ( https://review.coreboot.org/28666
Change subject: mb/google/poppy/variants/nocturne: Update DPTF settings
......................................................................
mb/google/poppy/variants/nocturne: Update DPTF settings
Update DPTF settings based on recommendation from thermal team.
BUG=b:112550414
BRANCH=None
TEST=Manually tested by thermal team.
Change-Id: I26f09392a3293ce4b3481f2be341a667d606bc10
Signed-off-by: Puthikorn Voravootivat <puthik at chromium.org>
---
M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl
1 file changed, 13 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/28666/1
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl
index c8bafb4..f9773b8 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl
@@ -14,28 +14,28 @@
* GNU General Public License for more details.
*/
-#define DPTF_CPU_PASSIVE 80
-#define DPTF_CPU_CRITICAL 105
+#define DPTF_CPU_PASSIVE 70
+#define DPTF_CPU_CRITICAL 100
#define DPTF_TSR0_SENSOR_ID 1
#define DPTF_TSR0_SENSOR_NAME "Ambient"
-#define DPTF_TSR0_PASSIVE 48
-#define DPTF_TSR0_CRITICAL 90
+#define DPTF_TSR0_PASSIVE 50
+#define DPTF_TSR0_CRITICAL 55
#define DPTF_TSR1_SENSOR_ID 2
#define DPTF_TSR1_SENSOR_NAME "Charger"
-#define DPTF_TSR1_PASSIVE 48
-#define DPTF_TSR1_CRITICAL 90
+#define DPTF_TSR1_PASSIVE 55
+#define DPTF_TSR1_CRITICAL 65
#define DPTF_TSR2_SENSOR_ID 3
#define DPTF_TSR2_SENSOR_NAME "DRAM"
-#define DPTF_TSR2_PASSIVE 65
-#define DPTF_TSR2_CRITICAL 75
+#define DPTF_TSR2_PASSIVE 45
+#define DPTF_TSR2_CRITICAL 48
#define DPTF_TSR3_SENSOR_ID 4
#define DPTF_TSR3_SENSOR_NAME "eMMC"
-#define DPTF_TSR3_PASSIVE 65
-#define DPTF_TSR3_CRITICAL 75
+#define DPTF_TSR3_PASSIVE 48
+#define DPTF_TSR3_CRITICAL 53
#undef DPTF_ENABLE_FAN_CONTROL
#define DPTF_ENABLE_CHARGER
@@ -64,6 +64,9 @@
#ifdef DPTF_ENABLE_CHARGER
/* Charger Throttle Effect on Charger (TSR1) */
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
+
+ /* Charger Throttle Effect on DRAM (TSR2) */
+ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
#endif
})
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I26f09392a3293ce4b3481f2be341a667d606bc10
Gerrit-Change-Number: 28666
Gerrit-PatchSet: 1
Gerrit-Owner: Puthikorn Voravootivat <puthik at chromium.org>
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