[coreboot-gerrit] Change in coreboot[master]: arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706
Richard Spiegel (Code Review)
gerrit at coreboot.org
Fri Sep 14 17:28:22 CEST 2018
Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28607
Change subject: arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706
......................................................................
arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706
There are 8 possible BERT context errors, with table ctx_names being a
table to print their names. Thus the table is supposed to have 8 elements,
and indeed it has 8 lines... but some lines are missing commas, and when
compiling it becomes a 5 element table. Add the commas at the appropriate
places.
BUG=b:115719190
TEST=none.
Change-Id: I04a2c82a25fe5f334637053ef81fa6daffb5b9c5
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/arch/x86/acpi_bert_storage.c
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/28607/1
diff --git a/src/arch/x86/acpi_bert_storage.c b/src/arch/x86/acpi_bert_storage.c
index 82ecc5f..961faa6 100644
--- a/src/arch/x86/acpi_bert_storage.c
+++ b/src/arch/x86/acpi_bert_storage.c
@@ -311,9 +311,9 @@
"MSR Registers",
"32-bit Mode Execution",
"64-bit Mode Execution",
- "FXSAVE"
- "32-bit Mode Debug"
- "64-bit Mode Debug"
+ "FXSAVE",
+ "32-bit Mode Debug",
+ "64-bit Mode Debug",
"Memory Mapped"
};
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I04a2c82a25fe5f334637053ef81fa6daffb5b9c5
Gerrit-Change-Number: 28607
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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