[coreboot-gerrit] Change in coreboot[master]: riscv: add physical memory protection(PMP) support

Xiang Wang (Code Review) gerrit at coreboot.org
Tue Sep 11 09:58:39 CEST 2018


Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/28569

to look at the new patch set (#2).

Change subject: riscv: add physical memory protection(PMP) support
......................................................................

riscv: add physical memory protection(PMP) support

Change-Id: I2e9e0c94e6518f63ade7680a3ce68bacfae219d4
Signed-off-by: Xiang Wang <wxjstz at 126.com>
---
A src/arch/riscv/include/arch/pmp.h
A src/arch/riscv/pmp.c
2 files changed, 340 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/28569/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I2e9e0c94e6518f63ade7680a3ce68bacfae219d4
Gerrit-Change-Number: 28569
Gerrit-PatchSet: 2
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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