[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variants/rammus: fix S0ix entering issue
Zhuohao Lee (Code Review)
gerrit at coreboot.org
Sat Sep 8 11:07:47 CEST 2018
Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/28543
Change subject: mb/google/poppy/variants/rammus: fix S0ix entering issue
......................................................................
mb/google/poppy/variants/rammus: fix S0ix entering issue
As we don't use the MIPI camera on Rammus, disabling SA Imaging Unit and
CIO2 devices to avoid the system failed to enter S0ix.
BUG=b:114502527
BRANCH=master
TEST=On DUT, echo freeze > /sys/power/state
1. check the S0ix status on EC console
2. check the value of /sys/kernel/debug/pmc_core/slp_s0_residency_usec
Change-Id: I91629732db01ee534f0ddb67a2b358d725ef810e
Signed-off-by: Zhuohao Lee <zhuohao at chromium.org>
---
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/28543/1
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
index 0e8ce4d..efed964 100644
--- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
@@ -40,8 +40,8 @@
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
register "SmbusEnable" = "1"
- register "Cio2Enable" = "1"
- register "SaImguEnable" = "1"
+ register "Cio2Enable" = "0"
+ register "SaImguEnable" = "0"
register "ScsEmmcEnabled" = "1"
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "2"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I91629732db01ee534f0ddb67a2b358d725ef810e
Gerrit-Change-Number: 28543
Gerrit-PatchSet: 1
Gerrit-Owner: Zhuohao Lee <zhuohao at chromium.org>
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