[coreboot-gerrit] Change in coreboot[master]: fsp_broadwell_de: enable spi console

Okash Khawaja (Code Review) gerrit at coreboot.org
Thu Sep 6 15:45:32 CEST 2018


Okash Khawaja has uploaded this change for review. ( https://review.coreboot.org/28528


Change subject: fsp_broadwell_de: enable spi console
......................................................................

fsp_broadwell_de: enable spi console

this enables spi console for wedge100s which broadwell_de. the console
size is 64kb.

Change-Id: Ib925c5aee88b65c46a81534405c364dd5649f8e8
Signed-off-by: Okash Khawaja <okash.khawaja at gmail.com>
---
M src/mainboard/ocp/wedge100s/board.fmd
M src/soc/intel/fsp_broadwell_de/Kconfig
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/intel/fsp_broadwell_de/spi.c
4 files changed, 8 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/28528/1

diff --git a/src/mainboard/ocp/wedge100s/board.fmd b/src/mainboard/ocp/wedge100s/board.fmd
index da6e3e3..8e44081 100644
--- a/src/mainboard/ocp/wedge100s/board.fmd
+++ b/src/mainboard/ocp/wedge100s/board.fmd
@@ -21,6 +21,7 @@
 			RO_VPD at 0x0 0x1000
 		}
 		RW_MRC_CACHE at 0x10000 0x10000
-		COREBOOT(CBFS)@0x20000 0x7e0000
+		CONSOLE at 0x20000 0x10000
+		COREBOOT(CBFS)@0x30000 0x7d0000
 	}
 }
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig
index cc3e6e2..37876b5 100644
--- a/src/soc/intel/fsp_broadwell_de/Kconfig
+++ b/src/soc/intel/fsp_broadwell_de/Kconfig
@@ -26,6 +26,7 @@
 	select SMM_TSEG
 	select HAVE_SMI_HANDLER
 	select TSC_MONOTONIC_TIMER
+	select TSC_CONSTANT_RATE
 
 config CBFS_SIZE
 	hex
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc
index 024035c..386adc1 100644
--- a/src/soc/intel/fsp_broadwell_de/Makefile.inc
+++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc
@@ -12,6 +12,7 @@
 subdirs-y += fsp
 
 romstage-y += gpio.c
+romstage-y += spi.c
 
 ramstage-y += spi.c
 ramstage-y += cpu.c
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index f602491..1b1589d 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -26,6 +26,7 @@
 #include <device/pci_ids.h>
 #include <spi_flash.h>
 #include <spi-generic.h>
+#include <arch/early_variables.h>
 
 #ifdef __SMM__
 #define pci_read_config_byte(dev, reg, targ)\
@@ -59,7 +60,7 @@
 
 typedef struct spi_slave ich_spi_slave;
 
-static int ichspi_lock = 0;
+static int ichspi_lock CAR_GLOBAL = 0;
 
 typedef struct ich9_spi_regs {
 	uint32_t bfpr;
@@ -109,7 +110,7 @@
 	uint32_t *bbar;
 } ich_spi_controller;
 
-static ich_spi_controller cntlr;
+static ich_spi_controller cntlr CAR_GLOBAL;
 
 enum {
 	SPIS_SCIP =		0x0001,
@@ -268,7 +269,7 @@
 	uint8_t bios_cntl;
 	ich9_spi_regs *ich9_spi;
 
-#ifdef __SMM__
+#if defined(__SIMPLE_DEVICE__)
 	pci_devfn_t dev = PCI_DEV(0, 31, 0);
 #else
 	struct device *dev;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib925c5aee88b65c46a81534405c364dd5649f8e8
Gerrit-Change-Number: 28528
Gerrit-PatchSet: 1
Gerrit-Owner: Okash Khawaja <okash.khawaja at gmail.com>
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