[coreboot-gerrit] Change in coreboot[master]: NOT_FOR_MERGE: Add code to dump BERT region contents

build bot (Jenkins) (Code Review) gerrit at coreboot.org
Tue Sep 4 22:09:10 CEST 2018


build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28480 )

Change subject: NOT_FOR_MERGE: Add code to dump BERT region contents
......................................................................


Patch Set 1:

(150 comments)

https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c
File src/soc/amd/stoneyridge/bertdump.c:

https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@46
PS1, Line 46: static const char *acpi_severity[] = {
static const char * array should probably be static const char * const


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@65
PS1, Line 65: 		printk(0, "               e   * Invalid bits %llx\n", check & ~valid);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@67
PS1, Line 67: 		printk(0, "               e   Transaction Type    = %llx %s\n", check & X86_PROC_CHK_XACT_MASK >> X86_PROC_CHK_XACT_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@67
PS1, Line 67: 		printk(0, "               e   Transaction Type    = %llx %s\n", check & X86_PROC_CHK_XACT_MASK >> X86_PROC_CHK_XACT_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@68
PS1, Line 68: 									check & X86_PROC_CHK_XACT_MASK ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@70
PS1, Line 70: 		printk(0, "               e   Operation           = %llx %s\n", check & X86_PROC_CHK_OPER_MASK >> X86_PROC_CHK_OPER_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@70
PS1, Line 70: 		printk(0, "               e   Operation           = %llx %s\n", check & X86_PROC_CHK_OPER_MASK >> X86_PROC_CHK_OPER_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@71
PS1, Line 71: 									check & X86_PROC_CHK_OPERATION_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@73
PS1, Line 73: 		printk(0, "               e   Cache Level         = %llx %s\n", check & X86_PROC_CHK_LEVEL_MASK >> X86_PROC_CHK_LEVEL_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@73
PS1, Line 73: 		printk(0, "               e   Cache Level         = %llx %s\n", check & X86_PROC_CHK_LEVEL_MASK >> X86_PROC_CHK_LEVEL_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@74
PS1, Line 74: 									check & X86_PROC_CHK_LEVEL_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@76
PS1, Line 76: 		printk(0, "               e   Context Corrupt     = %x %s\n", !!(check & X86_PROC_CHK_CTX_CORRUPT),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@77
PS1, Line 77: 									check & X86_PROC_CHK_CONTEXT_CORPT_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@79
PS1, Line 79: 		printk(0, "               e   Uncorrected         = %x %s\n", !!(check & X86_PROC_CHK_UNCORRECTED),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@80
PS1, Line 80: 									check & X86_PROC_CHK_UNCORRECTED_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@82
PS1, Line 82: 		printk(0, "               e   Precise IP          = %x %s\n", !!(check & X86_PROC_CHK_PRECISE_IP),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@83
PS1, Line 83: 									check & X86_PROC_CHK_PRECISE_IP_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@85
PS1, Line 85: 		printk(0, "               e   Restartable IP      = %x %s\n", !!(check & X86_PROC_CHK_RESTARTABLE_IP),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@86
PS1, Line 86: 									check & X86_PROC_CHK_RESTARTABLE_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@88
PS1, Line 88: 		printk(0, "               e   Overflow            = %x %s\n", !!(check & X86_PROC_CHK_OVERFLOW),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@89
PS1, Line 89: 									check & X86_PROC_CHK_OVERFLOW_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@91
PS1, Line 91: 		printk(0, "               e   Participation Type  = %llx %s\n", check & X86_PROC_CHK_PARTIC_MASK >> X86_PROC_CHK_PARTIC_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@91
PS1, Line 91: 		printk(0, "               e   Participation Type  = %llx %s\n", check & X86_PROC_CHK_PARTIC_MASK >> X86_PROC_CHK_PARTIC_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@92
PS1, Line 92: 									check & X86_PROC_CHK_PART_TYPE_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@94
PS1, Line 94: 		printk(0, "               e   Time Out            = %x %s\n", !!(check & X86_PROC_CHK_OVERFLOW),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@95
PS1, Line 95: 									check & X86_PROC_CHK_TIMEOUT ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@97
PS1, Line 97: 		printk(0, "               e   Address Space       = %llx %s\n", check & X86_PROC_CHK_PARTIC_MASK >> X86_PROC_CHK_PARTIC_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@97
PS1, Line 97: 		printk(0, "               e   Address Space       = %llx %s\n", check & X86_PROC_CHK_PARTIC_MASK >> X86_PROC_CHK_PARTIC_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@98
PS1, Line 98: 									check & X86_PROC_CHK_ADDR_SPACE_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@104
PS1, Line 104: 		printk(0, "               e   * Invalid bits %llx\n", check & ~valid);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@106
PS1, Line 106: 		printk(0, "               e   Transaction Type    = %llx %s\n", check & X86_PROC_MS_CHK_XACT_MASK >> X86_PROC_MS_CHK_XACT_SH,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@106
PS1, Line 106: 		printk(0, "               e   Transaction Type    = %llx %s\n", check & X86_PROC_MS_CHK_XACT_MASK >> X86_PROC_MS_CHK_XACT_SH,
Possible precedence defect with mask then right shift - may need parentheses


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@107
PS1, Line 107: 									check & X86_PROC_CHK_XACT_MASK ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@109
PS1, Line 109: 		printk(0, "               e   Uncorrected         = %x %s\n", !!(check & X86_PROC_MS_CHK_UNCORRECTED),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@110
PS1, Line 110: 									check & X86_PROC_CHK_UNCORRECTED_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@112
PS1, Line 112: 		printk(0, "               e   Precise IP          = %x %s\n", !!(check & X86_PROC_MS_CHK_PRECISE_IP),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@113
PS1, Line 113: 									check & X86_PROC_CHK_PRECISE_IP_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@115
PS1, Line 115: 		printk(0, "               e   Restartable IP      = %x %s\n", !!(check & X86_PROC_MS_CHK_RESTARTABLE_IP),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@116
PS1, Line 116: 									check & X86_PROC_CHK_RESTARTABLE_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@118
PS1, Line 118: 		printk(0, "               e   Overflow            = %x %s\n", !!(check & X86_PROC_MS_CHK_OVERFLOW),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@119
PS1, Line 119: 									check & X86_PROC_CHK_OVERFLOW_VALID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@122
PS1, Line 122: static const char *check_guid_names[] = {
static const char * array should probably be static const char * const


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@147
PS1, Line 147: 	printk(0, "               ___ CPER IA32/x64 Processor Error (Check) Information @0x%p - 0x%p (size 0x%zx) ___\n", err, err + 1, sizeof(*err));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@148
PS1, Line 148: 	printk(0, "               e   Structure Type GUID = %s\n", check_guid_name(err->type));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@151
PS1, Line 151: 	printk(0, "               e   Validation Bits     = %llx\n", err->validation);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@153
PS1, Line 153: 		x86_chkprint_with_valid(err->check_info, X86_PROC_CHK_XACT_TYPE_VALID | X86_PROC_CHK_OPERATION_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@154
PS1, Line 154: 						| X86_PROC_CHK_LEVEL_VALID | X86_PROC_CHK_CONTEXT_CORPT_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@155
PS1, Line 155: 						| X86_PROC_CHK_UNCORRECTED_VALID | X86_PROC_CHK_PRECISE_IP_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@156
PS1, Line 156: 						| X86_PROC_CHK_RESTARTABLE_VALID | X86_PROC_CHK_OVERFLOW_VALID);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@158
PS1, Line 158: 		x86_chkprint_with_valid(err->check_info, X86_PROC_CHK_XACT_TYPE_VALID | X86_PROC_CHK_OPERATION_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@159
PS1, Line 159: 						| X86_PROC_CHK_LEVEL_VALID | X86_PROC_CHK_CONTEXT_CORPT_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@160
PS1, Line 160: 						| X86_PROC_CHK_UNCORRECTED_VALID | X86_PROC_CHK_PRECISE_IP_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@161
PS1, Line 161: 						| X86_PROC_CHK_RESTARTABLE_VALID | X86_PROC_CHK_OVERFLOW_VALID);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@163
PS1, Line 163: 		x86_chkprint_with_valid(err->check_info, X86_PROC_CHK_XACT_TYPE_VALID | X86_PROC_CHK_OPERATION_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@164
PS1, Line 164: 						| X86_PROC_CHK_LEVEL_VALID | X86_PROC_CHK_CONTEXT_CORPT_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@165
PS1, Line 165: 						| X86_PROC_CHK_UNCORRECTED_VALID | X86_PROC_CHK_PRECISE_IP_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@166
PS1, Line 166: 						| X86_PROC_CHK_RESTARTABLE_VALID | X86_PROC_CHK_OVERFLOW_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@167
PS1, Line 167: 						| X86_PROC_CHK_PART_TYPE_VALID | X86_PROC_CHK_TIMEOUT_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@168
PS1, Line 168: 						| X86_PROC_CHK_ADDR_SPACE_VALID);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@170
PS1, Line 170: 		x86_mschkprint_with_valid(err->check_info, X86_PROC_CHK_XACT_TYPE_VALID | X86_PROC_CHK_OPERATION_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@171
PS1, Line 171: 						| X86_PROC_CHK_LEVEL_VALID | X86_PROC_CHK_CONTEXT_CORPT_VALID
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@172
PS1, Line 172: 						| X86_PROC_CHK_UNCORRECTED_VALID | X86_PROC_CHK_PRECISE_IP_VALID);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@179
PS1, Line 179: static const char *context_names[] = {
static const char * array should probably be static const char * const


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@210
PS1, Line 210: 	printk(0, "               ___ CPER IA32/x64 Processor Context Information @0x%p - 0x%p (size 0x%zx) ___\n", ctx,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@211
PS1, Line 211: 							(u8 *)ctx + ALIGN_UP(sizeof(*ctx) + ctx->array_size, 16),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@212
PS1, Line 212: 							ALIGN_UP(sizeof(*ctx) + ctx->array_size, 16));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@213
PS1, Line 213: 	printk(0, "               t   Context Type     = %x %s\n", ctx->type, context_name(ctx->type));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@214
PS1, Line 214: 	printk(0, "               t   Array Size       = %x\n", ctx->array_size);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@216
PS1, Line 216: 	printk(0, "               t   MM Address       = %llx\n", ctx->mmap_addr);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@224
PS1, Line 224: 		printk(0, "               t                      %08x_%08x\n", (u32)(*(array + i) >> 32), (u32)*(array + i));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@233
PS1, Line 233: 	int errs = (ia32->validation & I32X64SEC_VALID_ERRNUM_MASK) >> I32X64SEC_VALID_ERRNUM_SH;
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@234
PS1, Line 234: 	int ctxs = (ia32->validation & I32X64SEC_VALID_CTXNUM_MASK) >> I32X64SEC_VALID_CTXNUM_SH;
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@236
PS1, Line 236: 	printk(0, "           ___ CPER IA32/x64 Processor Error @0x%p sizeof(proc error section struct) is 0x%zx/%zd) ___\n", ia32, sizeof(*ia32), sizeof(*ia32));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@237
PS1, Line 237: 	printk(0, "           x   Validation Bits      = %llx\n", ia32->validation);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@240
PS1, Line 240: 	printk(0, "           x   Processor APIC ID    = %llx %s\n",   ia32->apicid, ia32->validation & I32X64SEC_VALID_LAPIC ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@241
PS1, Line 241: 	printk(0, "           x   Processor CPUID      = EAX = %x %s\n", (u32)ia32->cpuid[0], ia32->validation & I32X64SEC_VALID_CPUID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@242
PS1, Line 242: 	printk(0, "           x                          EBX = %x\n", (u32)ia32->cpuid[1]);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@243
PS1, Line 243: 	printk(0, "           x                          ECX = %x\n", (u32)ia32->cpuid[2]);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@244
PS1, Line 244: 	printk(0, "           x                          EDX = %x\n", (u32)ia32->cpuid[3]);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@248
PS1, Line 248: 		adder += parse_x86_error_info((cper_ia32x64_proc_error_info_t *)((u8 *)ia32 + adder));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@251
PS1, Line 251: 		adder += parse_x86_context_info((cper_ia32x64_context_t *)((u8 *)ia32 + adder));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@256
PS1, Line 256: static size_t parse_cper_structure_generic(cper_proc_generic_error_section_t *gen)
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@258
PS1, Line 258: 	printk(0, "           ___ CPER Generic Processor Error @0x%p sizeof(generic error struct) is 0x%zx/%zd\n", gen, sizeof(*gen), sizeof(*gen));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@259
PS1, Line 259: 	printk(0, "           c   Validation Bits      = %llx\n", gen->validation);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@260
PS1, Line 260: 	printk(0, "           c   Processor Type       = %x %s\n",   gen->proc_type, gen->validation & GENPROC_VALID_PROC_TYPE ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@261
PS1, Line 261: 	printk(0, "           c   Processor ISA        = %x %s\n",   gen->proc_isa, gen->validation & GENPROC_VALID_PROC_ISA ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@262
PS1, Line 262: 	printk(0, "           c   Processor Error Type = %x %s\n",   gen->error_type, gen->validation & GENPROC_VALID_PROC_ERR_TYPE ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@263
PS1, Line 263: 	printk(0, "           c   Operation            = %x %s\n",   gen->operation, gen->validation & GENPROC_VALID_OPERATION ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@264
PS1, Line 264: 	printk(0, "           c   Flags                = %x %s\n",   gen->flags, gen->validation & GENPROC_VALID_FLAGS ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@265
PS1, Line 265: 	printk(0, "           c   Level                = %x %s\n",   gen->level, gen->validation & GENPROC_VALID_LEVEL ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@266
PS1, Line 266: 	printk(0, "           c   CPU Version Info     = %llx %s\n", gen->cpu_version, gen->validation & GENPROC_VALID_CPU_VERSION ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@267
PS1, Line 267: 	printk(0, "           c   CPU Brand String     = %s %s\n",   gen->cpu_brand_string, gen->validation & GENPROC_VALID_CPU_BRAND ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@268
PS1, Line 268: 	printk(0, "           c   Processor ID         = %llx %s\n", gen->proc_id, gen->validation & GENPROC_VALID_CPU_ID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@269
PS1, Line 269: 	printk(0, "           c   Target Address       = %llx %s\n", gen->target_addr, gen->validation & GENPROC_VALID_TGT_ADDR ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@270
PS1, Line 270: 	printk(0, "           c   Requestor Identifier = %llx %s\n", gen->requestor_id, gen->validation & GENPROC_VALID_REQR_ID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@271
PS1, Line 271: 	printk(0, "           c   Responder Identifier = %llx %s\n", gen->responder_id, gen->validation & GENPROC_VALID_RSPR_ID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@272
PS1, Line 272: 	printk(0, "           c   Instruction IP       = %llx %s\n", gen->instruction_ip, gen->validation & GENPROC_VALID_INSTR_IP ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@296
PS1, Line 296: 		return sizeof(acpi_hest_generic_data_v300_t) + entry->data_length;
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@301
PS1, Line 301: static const char *guids382[] = {
static const char * array should probably be static const char * const


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@319
PS1, Line 319: 	if(!guidcmp(&guid, &CPER_SEC_PROC_GENERIC_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@321
PS1, Line 321: 	if(!guidcmp(&guid, &CPER_SEC_PROC_IA32X64_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@323
PS1, Line 323: 	if(!guidcmp(&guid, &CPER_SEC_PROC_ARM_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@325
PS1, Line 325: 	if(!guidcmp(&guid, &CPER_SEC_PLATFORM_MEM_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@327
PS1, Line 327: 	if(!guidcmp(&guid, &CPER_SEC_PLATFORM_MEM2_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@329
PS1, Line 329: 	if(!guidcmp(&guid, &CPER_SEC_PCIE_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@331
PS1, Line 331: 	if(!guidcmp(&guid, &CPER_SEC_FW_ERR_REC_REF_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@333
PS1, Line 333: 	if(!guidcmp(&guid, &CPER_SEC_PCI_X_BUS_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@335
PS1, Line 335: 	if(!guidcmp(&guid, &CPER_SEC_PCI_DEV_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@337
PS1, Line 337: 	if(!guidcmp(&guid, &CPER_SEC_DMAR_GENERIC_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@339
PS1, Line 339: 	if(!guidcmp(&guid, &CPER_SEC_DMAR_VT_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@341
PS1, Line 341: 	if(!guidcmp(&guid, &CPER_SEC_DMAR_IOMMU_GUID))
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@351
PS1, Line 351: 		printk(0, "      ___ 382 found @0x%p sizeof(%s) = 0x%zx/%zd ___\n", entry, entry->revision == 0x300 ? "v3" : "old-type",
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@352
PS1, Line 352: 				entry->revision == 0x300 ? sizeof(acpi_hest_generic_data_v300_t) : sizeof(acpi_hest_generic_data_t),
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@353
PS1, Line 353: 				entry->revision == 0x300 ? sizeof(acpi_hest_generic_data_v300_t) : sizeof(acpi_hest_generic_data_t));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@354
PS1, Line 354: 		printk(0, "      3   Section Type GUID = %s\n", guid382_name(entry->section_type));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@357
PS1, Line 357: 		printk(0, "      3   Severity          = %x: %s\n", entry->error_severity, acpi_sev(entry->error_severity));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@358
PS1, Line 358: 		printk(0, "      3   Revision          = %x\n", entry->revision);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@359
PS1, Line 359: 		printk(0, "      3   Validation        = %x\n", entry->validation_bits);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@361
PS1, Line 361: 		printk(0, "      3   Error Data Length = %x\n", entry->data_length);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@362
PS1, Line 362: 		printk(0, "      3   FRU ID            = <todo> %s\n", entry->validation_bits & ACPI_GENERROR_VALID_FRUID ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@363
PS1, Line 363: 		printk(0, "      3   FRU text          = <todo> %s\n", entry->validation_bits & ACPI_GENERROR_VALID_FRUID_TEXT ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@365
PS1, Line 365: 			/* I can cheat on x300 because I know only diff is timestamp */
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@370
PS1, Line 370: 				entry->timestamp.hour, entry->timestamp.min, entry->timestamp.sec,
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@371
PS1, Line 371: 				entry->validation_bits & ACPI_GENERROR_VALID_TIMESTAMP ? "V" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@375
PS1, Line 375: 		/* each table-382 entry should contain 0 or 1 cper structure at its end */
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@378
PS1, Line 378: 				parse_cper_structure((void *)(entry + 1), entry->section_type);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@380
PS1, Line 380: 				parse_cper_structure((void *)((u8 *)entry + sizeof(acpi_hest_generic_data_t)), entry->section_type);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@384
PS1, Line 384: 		entry = (acpi_hest_generic_data_v300_t *)((u8 *)entry + entry382_size(entry));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@400
PS1, Line 400: static acpi_hest_generic_data_v300_t *ptr382_from_bert_entry(acpi_generic_error_status_t *bert_data)
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@403
PS1, Line 403: 		return (acpi_hest_generic_data_v300_t *)((u8 *)bert_data + sizeof(*bert_data));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@429
PS1, Line 429: 	printk(0, "***** BERT storage at 0x%p - 0x%p (%zd) *****\n", bert_base, (u8 *)bert_base + size, size);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@431
PS1, Line 431: 	while(offset < size) {
space required before the open parenthesis '('


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@432
PS1, Line 432: 		entries = (bert_data->block_status & GENERIC_ERR_STS_ENTRY_COUNT_MASK) >> GENERIC_ERR_STS_ENTRY_COUNT_SHIFT;
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@433
PS1, Line 433: 		printk(0, " ___ BERT entry @0x%p - (sizeof(status)=0x%zx/%zd) ___\n", bert_data, sizeof(*bert_data), sizeof(*bert_data));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@434
PS1, Line 434: 		printk(0, " b   Block Status    = %x\n", bert_data->block_status);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@436
PS1, Line 436: 					bert_data->block_status & BIT(0) ? " uncorrectable" : "",
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@437
PS1, Line 437: 					bert_data->block_status & BIT(1) ? " correctable" : "",
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@438
PS1, Line 438: 					bert_data->block_status & BIT(2) ? " mult-uncorrected" : "",
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@439
PS1, Line 439: 					bert_data->block_status & BIT(3) ? " mult-corrected" : "");
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@441
PS1, Line 441: 		printk(0, " b   Raw Data Offset = %x\n", bert_data->raw_data_offset);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@442
PS1, Line 442: 		printk(0, " b   Raw Data Length = %x\n", bert_data->raw_data_length);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@443
PS1, Line 443: 		printk(0, " b   Data Length     = %x\n", bert_data->data_length);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@444
PS1, Line 444: 		printk(0, " b   Error Severity  = %x: %s\n", bert_data->error_severity, acpi_sev(bert_data->error_severity));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@445
PS1, Line 445: 		if (bert_data->data_length && bert_data->data_length < sizeof(acpi_hest_generic_data_v300_t))
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@447
PS1, Line 447: 					bert_data->data_length, sizeof(acpi_hest_generic_data_v300_t));
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@448
PS1, Line 448: 		if (bert_data->raw_data_length && bert_data->raw_data_offset < sizeof(*bert_data) + bert_data->data_length)
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@450
PS1, Line 450: 					bert_data->raw_data_offset, sizeof(*bert_data), bert_data->data_length);
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@453
PS1, Line 453: 		/* can have zero or more data entries, of type 382 and/or of raw */
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@454
PS1, Line 454: 		gen382 = ptr382_from_bert_entry(bert_data); // todo: this only handles a single 382 entry
line over 80 characters


https://review.coreboot.org/#/c/28480/1/src/soc/amd/stoneyridge/bertdump.c@463
PS1, Line 463: 		bert_data = (acpi_generic_error_status_t *)((u8 *)bert_data + offset);
line over 80 characters



-- 
To view, visit https://review.coreboot.org/28480
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I8ecf920499a662db34a332e9df05e4ee2383b6d4
Gerrit-Change-Number: 28480
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 04 Sep 2018 20:09:10 +0000
Gerrit-HasComments: Yes
Gerrit-HasLabels: No
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180904/0d6b6894/attachment.html>


More information about the coreboot-gerrit mailing list