[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add additional UPD

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/29324 )

Change subject: soc/intel/cannonlake: Add additional UPD
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Patch Set 5:

@intel guys do you have some info about the performance and internals what it does? Just changing the seed of the scrambler or overwriting the whole memory. If so where does the random come from?


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Iddd2ffac59561941319563d1bbc45c542f99da27
Gerrit-Change-Number: 29324
Gerrit-PatchSet: 5
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph at 9elements.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Patrick Rudolph <siro at das-labor.org>
Gerrit-Comment-Date: Tue, 30 Oct 2018 12:24:12 +0000
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