[coreboot-gerrit] Change in coreboot[master]: riscv: simplify timer interrupt handling

[Philipp Hug (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/29340

to look at the new patch set (#4).

Change subject: riscv: simplify timer interrupt handling
......................................................................

riscv: simplify timer interrupt handling

Just disable the timer interrupt and notify supervisor.
To receive another timer interrupt just set timecmp and
enable machine mode timer interrupt again.

TEST=Run linux on sifive unleashed

Change-Id: I5d693f872bd492c9d0017b514882a4cebd5ccadd
Signed-off-by: Philipp Hug <philipp at hug.cx>
---
M src/arch/riscv/trap_handler.c
1 file changed, 8 insertions(+), 51 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/29340/4
-- 
To view, visit https://review.coreboot.org/29340
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I5d693f872bd492c9d0017b514882a4cebd5ccadd
Gerrit-Change-Number: 29340
Gerrit-PatchSet: 4
Gerrit-Owner: Philipp Hug <philipp at hug.cx>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20181029/2e8facad/attachment.html>