[coreboot-gerrit] Change in coreboot[master]: riscv: simplify timer interrupt handling
Philipp Hug (Code Review)
gerrit at coreboot.org
Mon Oct 29 18:28:49 CET 2018
Philipp Hug has uploaded a new patch set (#2). ( https://review.coreboot.org/29340 )
Change subject: riscv: simplify timer interrupt handling
......................................................................
riscv: simplify timer interrupt handling
Just disable the timer interrupt and notify supervisor.
To receive another timer interrupt just set timecmp and
enable machine mode timer interrupt again.
TEST=Run linux on sifive unleashed
Change-Id: I5d693f872bd492c9d0017b514882a4cebd5ccadd
Signed-off-by: Philipp Hug <philipp at hug.cx>
---
M src/arch/riscv/trap_handler.c
1 file changed, 45 insertions(+), 84 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/29340/2
--
To view, visit https://review.coreboot.org/29340
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I5d693f872bd492c9d0017b514882a4cebd5ccadd
Gerrit-Change-Number: 29340
Gerrit-PatchSet: 2
Gerrit-Owner: Philipp Hug <philipp at hug.cx>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20181029/73ad599f/attachment.html>
More information about the coreboot-gerrit
mailing list