[coreboot-gerrit] Change in coreboot[master]: src: Remove unneeded include <cbfs.h>
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Sat Oct 27 18:53:06 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29303
Change subject: src: Remove unneeded include <cbfs.h>
......................................................................
src: Remove unneeded include <cbfs.h>
Change-Id: Iab0bd1c5482331a0c048a05ab806bf5c4dbda780
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/cpu/intel/haswell/romstage.c
M src/drivers/intel/fsp1_1/ramstage.c
M src/drivers/intel/fsp1_1/vbt.c
M src/drivers/intel/fsp2_0/graphics.c
M src/drivers/intel/fsp2_0/util.c
M src/drivers/spi/spi_flash.c
M src/lib/fit.c
M src/lib/fit_payload.c
M src/mainboard/asus/f2a85-m/BiosCallOuts.c
M src/mainboard/cubietech/cubieboard/romstage.c
M src/mainboard/google/beltino/romstage.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/daisy/romstage.c
M src/mainboard/google/jecht/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/peach_pit/romstage.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/google/veyron/romstage.c
M src/mainboard/google/veyron_mickey/romstage.c
M src/mainboard/google/veyron_rialto/romstage.c
M src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c
M src/mainboard/intel/cannonlake_rvp/spd/spd_util.c
M src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
M src/mainboard/intel/icelake_rvp/spd/spd_util.c
M src/mainboard/intel/kblrvp/spd/spd_util.c
M src/mainboard/intel/kunimitsu/romstage_fsp20.c
M src/mainboard/intel/kunimitsu/spd/spd.c
M src/mainboard/intel/saddlebrook/romstage.c
M src/mainboard/intel/strago/romstage.c
M src/mainboard/lenovo/g505s/BiosCallOuts.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/msi/ms7721/BiosCallOuts.c
M src/mainboard/siemens/mc_tcu3/lcd_panel.c
M src/mainboard/ti/beaglebone/romstage.c
M src/northbridge/intel/nehalem/raminit.c
M src/security/vboot/common.c
M src/security/vboot/vboot_handoff.c
M src/soc/broadcom/cygnus/romstage.c
M src/soc/intel/apollolake/romstage.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/braswell/acpi.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/common/vbt.c
M src/soc/intel/denverton_ns/memmap.c
M src/soc/mediatek/mt8173/include/soc/flash_controller.h
M src/soc/nvidia/tegra124/bootblock.c
M src/soc/nvidia/tegra124/spi.c
M src/soc/nvidia/tegra210/ccplex.c
M src/soc/nvidia/tegra210/romstage.c
M src/soc/nvidia/tegra210/spi.c
M src/soc/rockchip/common/i2c.c
M src/southbridge/intel/bd82x6x/early_pch.c
56 files changed, 1 insertion(+), 56 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/29303/1
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8c65dae..e5d073e 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -15,7 +15,6 @@
#include <stdint.h>
#include <string.h>
-#include <cbfs.h>
#include <console/console.h>
#include <arch/cpu.h>
#include <cf9_reset.h>
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 2b857ab..bfc58f8 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -17,7 +17,6 @@
#include <bootmode.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#include <cbfs.h>
#include <console/console.h>
#include <fsp/memmap.h>
#include <fsp/ramstage.h>
diff --git a/src/drivers/intel/fsp1_1/vbt.c b/src/drivers/intel/fsp1_1/vbt.c
index b6bb308..90012ff 100644
--- a/src/drivers/intel/fsp1_1/vbt.c
+++ b/src/drivers/intel/fsp1_1/vbt.c
@@ -15,7 +15,6 @@
*/
#include <bootmode.h>
-#include <cbfs.h>
#include <console/console.h>
#include <drivers/intel/gma/opregion.h>
#include <fsp/ramstage.h>
diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c
index e851497..e0c63d2 100644
--- a/src/drivers/intel/fsp2_0/graphics.c
+++ b/src/drivers/intel/fsp2_0/graphics.c
@@ -10,7 +10,6 @@
* (at your option) any later version.
*/
-#include <cbfs.h>
#include <console/console.h>
#include <fsp/util.h>
#include <soc/intel/common/vbt.h>
diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
index 98026f3..69021cd 100644
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -12,7 +12,6 @@
*/
#include <arch/io.h>
-#include <cbfs.h>
#include <cf9_reset.h>
#include <console/console.h>
#include <fsp/util.h>
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index c484088..29c33ea 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -10,7 +10,6 @@
#include <arch/early_variables.h>
#include <assert.h>
#include <boot_device.h>
-#include <cbfs.h>
#include <cpu/x86/smm.h>
#include <delay.h>
#include <rules.h>
diff --git a/src/lib/fit.c b/src/lib/fit.c
index da55072..01f8d56 100644
--- a/src/lib/fit.c
+++ b/src/lib/fit.c
@@ -21,7 +21,6 @@
#include <bootmem.h>
#include <stdlib.h>
#include <string.h>
-#include <cbfs.h>
#include <program_loading.h>
#include <timestamp.h>
#include <memrange.h>
diff --git a/src/lib/fit_payload.c b/src/lib/fit_payload.c
index 3e1819d..3e1ab21 100644
--- a/src/lib/fit_payload.c
+++ b/src/lib/fit_payload.c
@@ -24,7 +24,6 @@
#include <fit.h>
#include <program_loading.h>
#include <timestamp.h>
-#include <cbfs.h>
#include <string.h>
#include <commonlib/compression.h>
#include <lib.h>
diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c
index 0481dfc..ea94ebd 100644
--- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c
+++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cbfs.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h>
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c
index 6af46d9..665eb9d 100644
--- a/src/mainboard/cubietech/cubieboard/romstage.c
+++ b/src/mainboard/cubietech/cubieboard/romstage.c
@@ -24,7 +24,6 @@
*/
#include <arch/stages.h>
-#include <cbfs.h>
#include <console/console.h>
#include <cpu/allwinner/a10/clock.h>
#include <cpu/allwinner/a10/gpio.h>
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index cb719c3..d7e3105 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index d68a46c..26f6da4 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -34,7 +34,6 @@
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
#endif
-#include <cbfs.h>
void pch_enable_lpc(void)
{
diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c
index 24c9034..3886ce4 100644
--- a/src/mainboard/google/daisy/romstage.c
+++ b/src/mainboard/google/daisy/romstage.c
@@ -17,7 +17,6 @@
#include <arch/exception.h>
#include <arch/stages.h>
#include <armv7.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <program_loading.h>
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c
index c3a5720..7eccca9 100644
--- a/src/mainboard/google/jecht/romstage.c
+++ b/src/mainboard/google/jecht/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
#include <string.h>
#include <ec/google/chromeec/ec.h>
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index b96917e..9469254 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -17,7 +17,6 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index b96917e..9469254 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -17,7 +17,6 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index cc8f90e..85c80d7 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -17,7 +17,6 @@
#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 163f4c3..aa8c51f 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -31,7 +31,6 @@
#include <southbridge/intel/common/gpio.h>
#include <arch/cpu.h>
#include <halt.h>
-#include <cbfs.h>
#include "ec/compal/ene932/ec.h"
void pch_enable_lpc(void)
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index 751b40b..3992e75 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -18,7 +18,6 @@
#include <arch/stages.h>
#include <armv7.h>
#include <boot_device.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <commonlib/region.h>
#include <console/console.h>
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index d56dfd4..f2a086f 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -32,7 +32,6 @@
#include <arch/cpu.h>
#include <halt.h>
#include <bootmode.h>
-#include <cbfs.h>
#include <ec/quanta/it8518/ec.h>
#include "ec.h"
#include "onboard.h"
diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c
index bacbeca..c1a1188 100644
--- a/src/mainboard/google/veyron/romstage.c
+++ b/src/mainboard/google/veyron/romstage.c
@@ -18,7 +18,6 @@
#include <arch/stages.h>
#include <armv7.h>
#include <assert.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c
index 1c139f1..25a3d6c 100644
--- a/src/mainboard/google/veyron_mickey/romstage.c
+++ b/src/mainboard/google/veyron_mickey/romstage.c
@@ -18,7 +18,6 @@
#include <arch/stages.h>
#include <armv7.h>
#include <assert.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c
index 62a03f5..f125994 100644
--- a/src/mainboard/google/veyron_rialto/romstage.c
+++ b/src/mainboard/google/veyron_rialto/romstage.c
@@ -19,7 +19,6 @@
#include <arch/stages.h>
#include <armv7.h>
#include <assert.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c
index 201198d..1618162 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cbfs.h>
#include <southbridge/amd/agesa/hudson/imc.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h>
diff --git a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c
index 31f5452..390929e 100644
--- a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c
+++ b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
index 3ee98a1..2d23fa3 100644
--- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
@@ -14,7 +14,6 @@
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <fsp/api.h>
#include <soc/romstage.h>
diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c
index 9855afa..25f7f20 100644
--- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c
+++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/intel/kblrvp/spd/spd_util.c b/src/mainboard/intel/kblrvp/spd/spd_util.c
index 181af9f..12d9d10 100644
--- a/src/mainboard/intel/kblrvp/spd/spd_util.c
+++ b/src/mainboard/intel/kblrvp/spd/spd_util.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/intel/kunimitsu/romstage_fsp20.c b/src/mainboard/intel/kunimitsu/romstage_fsp20.c
index d4fd113..a8834d8 100644
--- a/src/mainboard/intel/kunimitsu/romstage_fsp20.c
+++ b/src/mainboard/intel/kunimitsu/romstage_fsp20.c
@@ -14,7 +14,6 @@
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <fsp/api.h>
#include <gpio.h>
diff --git a/src/mainboard/intel/kunimitsu/spd/spd.c b/src/mainboard/intel/kunimitsu/spd/spd.c
index fe30621..8656d4b 100644
--- a/src/mainboard/intel/kunimitsu/spd/spd.c
+++ b/src/mainboard/intel/kunimitsu/spd/spd.c
@@ -15,7 +15,6 @@
*/
#include <arch/byteorder.h>
-#include <cbfs.h>
#include <console/console.h>
#include <soc/pei_data.h>
#include <soc/romstage.h>
diff --git a/src/mainboard/intel/saddlebrook/romstage.c b/src/mainboard/intel/saddlebrook/romstage.c
index 49fa5e3..60e8f06 100644
--- a/src/mainboard/intel/saddlebrook/romstage.c
+++ b/src/mainboard/intel/saddlebrook/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
#include <fsp/api.h>
#include <string.h>
diff --git a/src/mainboard/intel/strago/romstage.c b/src/mainboard/intel/strago/romstage.c
index 56ab9a7..759d517 100644
--- a/src/mainboard/intel/strago/romstage.c
+++ b/src/mainboard/intel/strago/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
#include <lib.h>
#include <soc/gpio.h>
diff --git a/src/mainboard/lenovo/g505s/BiosCallOuts.c b/src/mainboard/lenovo/g505s/BiosCallOuts.c
index 201198d..1618162 100644
--- a/src/mainboard/lenovo/g505s/BiosCallOuts.c
+++ b/src/mainboard/lenovo/g505s/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cbfs.h>
#include <southbridge/amd/agesa/hudson/imc.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h>
diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c
index c9a7f8e..ac28717 100644
--- a/src/mainboard/lenovo/t520/romstage.c
+++ b/src/mainboard/lenovo/t520/romstage.c
@@ -30,7 +30,6 @@
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
#include <arch/cpu.h>
-#include <cbfs.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index d0ff67e..6ddf764 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -30,7 +30,6 @@
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
#include <arch/cpu.h>
-#include <cbfs.h>
void pch_enable_lpc(void)
{
diff --git a/src/mainboard/msi/ms7721/BiosCallOuts.c b/src/mainboard/msi/ms7721/BiosCallOuts.c
index 03896de..310f204 100644
--- a/src/mainboard/msi/ms7721/BiosCallOuts.c
+++ b/src/mainboard/msi/ms7721/BiosCallOuts.c
@@ -18,7 +18,6 @@
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cbfs.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h>
diff --git a/src/mainboard/siemens/mc_tcu3/lcd_panel.c b/src/mainboard/siemens/mc_tcu3/lcd_panel.c
index f48bd56..c4456af 100644
--- a/src/mainboard/siemens/mc_tcu3/lcd_panel.c
+++ b/src/mainboard/siemens/mc_tcu3/lcd_panel.c
@@ -12,7 +12,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <cbfs.h>
+
#include <console/console.h>
#include <string.h>
#include "soc/gpio.h"
diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c
index e7adf5f..e809ce4 100644
--- a/src/mainboard/ti/beaglebone/romstage.c
+++ b/src/mainboard/ti/beaglebone/romstage.c
@@ -16,7 +16,6 @@
#include <types.h>
#include <armv7.h>
-#include <cbfs.h>
#include <program_loading.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 3160039..b082300 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -21,7 +21,6 @@
#include <cpu/x86/msr.h>
#include <cbmem.h>
#include <arch/cbfs.h>
-#include <cbfs.h>
#include <ip_checksum.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
diff --git a/src/security/vboot/common.c b/src/security/vboot/common.c
index 72228e4..73d0feb 100644
--- a/src/security/vboot/common.c
+++ b/src/security/vboot/common.c
@@ -14,7 +14,6 @@
*/
#include <assert.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/security/vboot/vboot_handoff.c b/src/security/vboot/vboot_handoff.c
index 9fecc1a..684b495 100644
--- a/src/security/vboot/vboot_handoff.c
+++ b/src/security/vboot/vboot_handoff.c
@@ -26,7 +26,6 @@
#include <assert.h>
#include <bootmode.h>
#include <string.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <console/vtxprintf.h>
diff --git a/src/soc/broadcom/cygnus/romstage.c b/src/soc/broadcom/cygnus/romstage.c
index eab4e60..6af7704 100644
--- a/src/soc/broadcom/cygnus/romstage.c
+++ b/src/soc/broadcom/cygnus/romstage.c
@@ -17,7 +17,6 @@
#include <arch/exception.h>
#include <arch/stages.h>
#include <armv7.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index d2ec6c1..ec84dcd 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -22,7 +22,6 @@
#include <arch/symbols.h>
#include <assert.h>
#include <bootmode.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <cf9_reset.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index af67434..18c9353 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <arch/early_variables.h>
#include <console/console.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <cpu/x86/mtrr.h>
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index c11adb9..42eaeab 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -20,7 +20,6 @@
#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/smp/mpspec.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 3abc853..e5118de 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -21,7 +21,6 @@
#include <arch/early_variables.h>
#include <bootmode.h>
#include <console/console.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <cpu/x86/mtrr.h>
#include <elog.h>
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index 9eaa2cb..f769b29 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <cbfs.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <bootmode.h>
diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c
index 813d5c6..380e6d3 100644
--- a/src/soc/intel/denverton_ns/memmap.c
+++ b/src/soc/intel/denverton_ns/memmap.c
@@ -15,7 +15,6 @@
*/
#include <arch/io.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <assert.h>
#include <device/device.h>
diff --git a/src/soc/mediatek/mt8173/include/soc/flash_controller.h b/src/soc/mediatek/mt8173/include/soc/flash_controller.h
index da306c5..8d7db8b 100644
--- a/src/soc/mediatek/mt8173/include/soc/flash_controller.h
+++ b/src/soc/mediatek/mt8173/include/soc/flash_controller.h
@@ -16,7 +16,6 @@
#ifndef __SOC_MEDIATEK_MT8173_FLASH_CONTROLLER_H__
#define __SOC_MEDIATEK_MT8173_FLASH_CONTROLLER_H__
-#include <cbfs.h>
#include <spi-generic.h>
#include <stdint.h>
#include <soc/addressmap.h>
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index ce41242..182fadb 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -17,7 +17,6 @@
#include <arch/exception.h>
#include <arch/stages.h>
#include <bootblock_common.h>
-#include <cbfs.h>
#include <console/console.h>
#include <program_loading.h>
#include <soc/clock.h>
diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c
index ae07d53..f7665d8 100644
--- a/src/soc/nvidia/tegra124/spi.c
+++ b/src/soc/nvidia/tegra124/spi.c
@@ -19,7 +19,6 @@
#include <assert.h>
#include <boot_device.h>
#include <console/console.h>
-#include <cbfs.h>
#include <delay.h>
#include <inttypes.h>
#include <soc/addressmap.h>
diff --git a/src/soc/nvidia/tegra210/ccplex.c b/src/soc/nvidia/tegra210/ccplex.c
index 8759c73..867f106 100644
--- a/src/soc/nvidia/tegra210/ccplex.c
+++ b/src/soc/nvidia/tegra210/ccplex.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <cbfs.h>
#include <console/console.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index 07bf5d4..bce8404 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -15,7 +15,6 @@
#include <arch/exception.h>
#include <arch/stages.h>
-#include <cbfs.h>
#include <cbmem.h>
#include <console/cbmem_console.h>
#include <console/console.h>
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index 54e46f1..ad6e200 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <assert.h>
#include <boot_device.h>
-#include <cbfs.h>
#include <console/console.h>
#include <delay.h>
#include <inttypes.h>
diff --git a/src/soc/rockchip/common/i2c.c b/src/soc/rockchip/common/i2c.c
index 09b5624..f99b3b5 100644
--- a/src/soc/rockchip/common/i2c.c
+++ b/src/soc/rockchip/common/i2c.c
@@ -15,7 +15,6 @@
#include <arch/io.h>
#include <assert.h>
-#include <cbfs.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c_simple.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 1254a16..aa69981 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -17,7 +17,6 @@
#include <arch/io.h>
#include <cbmem.h>
#include <arch/cbfs.h>
-#include <cbfs.h>
#include <ip_checksum.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iab0bd1c5482331a0c048a05ab806bf5c4dbda780
Gerrit-Change-Number: 29303
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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