[coreboot-gerrit] Change in coreboot[master]: src: Remove unneeded include <cbmem.h>
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Sat Oct 27 18:00:48 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29302
Change subject: src: Remove unneeded include <cbmem.h>
......................................................................
src: Remove unneeded include <cbmem.h>
Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/arch/arm/armv7/mmu.c
M src/arch/arm64/arm_tf.c
M src/arch/arm64/boot.c
M src/cpu/allwinner/a10/cpu.c
M src/cpu/amd/car/post_cache_as_ram.c
M src/drivers/amd/agesa/state_machine.c
M src/drivers/intel/fsp1_1/hob.c
M src/drivers/intel/fsp1_1/ramstage.c
M src/drivers/intel/fsp1_1/stack.c
M src/mainboard/emulation/qemu-i440fx/northbridge.c
M src/mainboard/google/slippy/acpi_tables.c
M src/northbridge/amd/agesa/family12/northbridge.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/e7505/raminit.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/fsp_sandybridge/raminit.c
M src/northbridge/intel/gm45/acpi.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i945/acpi.c
M src/northbridge/intel/i945/raminit.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/sandybridge/early_init.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/x4x/acpi.c
M src/northbridge/intel/x4x/early_init.c
M src/northbridge/via/vx900/early_vx900.h
M src/northbridge/via/vx900/northbridge.c
M src/security/vboot/vboot_loader.c
M src/soc/amd/common/block/s3/s3_resume.c
M src/soc/intel/braswell/southcluster.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/systemagent.c
M src/soc/intel/cannonlake/romstage/power_state.c
M src/soc/intel/denverton_ns/chip.c
M src/soc/intel/denverton_ns/systemagent.c
M src/soc/intel/fsp_baytrail/southcluster.c
M src/soc/intel/icelake/romstage/power_state.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/nvidia/tegra124/display.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/rockchip/rk3288/soc.c
M src/soc/samsung/exynos5250/cpu.c
M src/soc/samsung/exynos5420/cpu.c
M src/southbridge/amd/agesa/hudson/early_setup.c
M src/southbridge/amd/agesa/hudson/hudson.c
M src/southbridge/amd/cimx/sb800/cfg.c
M src/southbridge/amd/cimx/sb800/lpc.c
M src/southbridge/amd/pi/hudson/early_setup.c
M src/southbridge/amd/pi/hudson/hudson.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/intel/bd82x6x/early_pch.c
M src/southbridge/intel/bd82x6x/madt.c
62 files changed, 0 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/29302/1
diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index 935f778..b63497c 100644
--- a/src/arch/arm/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
@@ -33,7 +33,6 @@
#include <stdint.h>
#include <symbols.h>
-#include <cbmem.h>
#include <console/console.h>
#include <arch/cache.h>
diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c
index 384b1b7..eaf8739 100644
--- a/src/arch/arm64/arm_tf.c
+++ b/src/arch/arm64/arm_tf.c
@@ -20,7 +20,6 @@
#include <arm_tf.h>
#include <assert.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <program_loading.h>
/*
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index d8a4630..cd98b03 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -18,7 +18,6 @@
#include <arch/stages.h>
#include <arch/transition.h>
#include <arm_tf.h>
-#include <cbmem.h>
#include <console/console.h>
#include <program_loading.h>
#include <rules.h>
diff --git a/src/cpu/allwinner/a10/cpu.c b/src/cpu/allwinner/a10/cpu.c
index 60b93be..eac8da6 100644
--- a/src/cpu/allwinner/a10/cpu.c
+++ b/src/cpu/allwinner/a10/cpu.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <device/device.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <symbols.h>
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index adf959c..e55ef40 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -26,7 +26,6 @@
#include <cpu/amd/msr.h>
#include <arch/acpi.h>
#include <romstage_handoff.h>
-#include <cbmem.h>
#include "cpu/amd/car/disable_cache_as_ram.c"
diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c
index e1fdd42..b9cb090 100644
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -20,7 +20,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
index 85d0f35..032d275 100644
--- a/src/drivers/intel/fsp1_1/hob.c
+++ b/src/drivers/intel/fsp1_1/hob.c
@@ -17,7 +17,6 @@
#include <arch/early_variables.h>
#include <arch/hlt.h>
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <fsp/util.h>
#include <ip_checksum.h>
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 2b857ab..312ef1e 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -16,7 +16,6 @@
#include <bootmode.h>
#include <arch/acpi.h>
-#include <cbmem.h>
#include <cbfs.h>
#include <console/console.h>
#include <fsp/memmap.h>
diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c
index e4b30dd..bbbd599 100644
--- a/src/drivers/intel/fsp1_1/stack.c
+++ b/src/drivers/intel/fsp1_1/stack.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <fsp/memmap.h>
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index aa309de..ee02726 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -23,7 +23,6 @@
#include <string.h>
#include <delay.h>
#include <smbios.h>
-#include <cbmem.h>
#include "fw_cfg.h"
#include "fw_cfg_if.h"
diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c
index 4036f1b..63ff7bc 100644
--- a/src/mainboard/google/slippy/acpi_tables.c
+++ b/src/mainboard/google/slippy/acpi_tables.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <cbmem.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 1851118..ff011e3 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 0a56d18..b843c79 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 7248eb7..0361a77 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <AGESA.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index a42ee5c..b3b0ba1 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -26,7 +26,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index f6cb285..f42bba1 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index fb3610d..8488ba0 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 7125e1e..f4cb9a0 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <lib.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index a5dc6cd..b4752c4 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -20,7 +20,6 @@
#include <stdlib.h>
#include <string.h>
#include "e7505.h"
-#include <cbmem.h>
#include <arch/acpi.h>
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 5dcc1fa..215464c 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -38,7 +38,6 @@
#include <assert.h>
#include <spd.h>
#include <sdram_mode.h>
-#include <cbmem.h>
#include "raminit.h"
#include "e7505.h"
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 94855cf..93d9c63 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index 111c201..c468e25 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
#include <fsp_util.h>
diff --git a/src/northbridge/intel/fsp_sandybridge/raminit.c b/src/northbridge/intel/fsp_sandybridge/raminit.c
index f67d405..a9648ed 100644
--- a/src/northbridge/intel/fsp_sandybridge/raminit.c
+++ b/src/northbridge/intel/fsp_sandybridge/raminit.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <string.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <device/pci_def.h>
#include "raminit.h"
#include "northbridge.h"
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index d208eed..3df37e8 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -22,7 +22,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include <arch/acpigen.h>
#include <cpu/cpu.h>
#include "gm45.h"
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 0453246..53583f8 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -28,7 +28,6 @@
#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include "chip.h"
#include "haswell.h"
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index affd8a1..b8aa4a4 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
#include "northbridge.h"
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 990d3de..d2a426f 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -22,7 +22,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include <arch/acpigen.h>
#include <cpu/cpu.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index c259530..ad4c6ed 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -27,7 +27,6 @@
#include "raminit.h"
#include "i945.h"
#include "chip.h"
-#include <cbmem.h>
#include <device/dram/ddr2.h>
/* Debugging macros. */
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 4c6cdd4..00f6913 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -28,7 +28,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "nehalem.h"
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 7b4b3be..f8ecc1a 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <device/pci_def.h>
#include <elog.h>
-#include <cbmem.h>
#include <pc80/mc146818rtc.h>
#include <romstage_handoff.h>
#include "sandybridge.h"
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index cb0e5db..5ec8292 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include "chip.h"
#include "sandybridge.h"
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index 678486c..182e092 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -23,7 +23,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cbmem.h>
#include <arch/acpigen.h>
#include <cpu/cpu.h>
#include "x4x.h"
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index d410259..c6eb383 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -24,7 +24,6 @@
#endif
#include <pc80/mc146818rtc.h>
#include "x4x.h"
-#include <cbmem.h>
#include <console/console.h>
#include <halt.h>
#include <romstage_handoff.h>
diff --git a/src/northbridge/via/vx900/early_vx900.h b/src/northbridge/via/vx900/early_vx900.h
index 11c561a..2caa763 100644
--- a/src/northbridge/via/vx900/early_vx900.h
+++ b/src/northbridge/via/vx900/early_vx900.h
@@ -21,7 +21,6 @@
#include "vx900.h"
#include <arch/io.h>
-#include <cbmem.h>
#include <stdint.h>
#include <arch/io.h>
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index a699d86..3315524 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -22,7 +22,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
-#include <cbmem.h>
#include <cf9_reset.h>
#include <lib.h>
#include <reset.h>
diff --git a/src/security/vboot/vboot_loader.c b/src/security/vboot/vboot_loader.c
index 17ea0a9..57a3b49 100644
--- a/src/security/vboot/vboot_loader.c
+++ b/src/security/vboot/vboot_loader.c
@@ -15,7 +15,6 @@
#include <arch/early_variables.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <rmodule.h>
diff --git a/src/soc/amd/common/block/s3/s3_resume.c b/src/soc/amd/common/block/s3/s3_resume.c
index 1ba9468..04414e8 100644
--- a/src/soc/amd/common/block/s3/s3_resume.c
+++ b/src/soc/amd/common/block/s3/s3_resume.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <cbmem.h>
#include <stage_cache.h>
#include <mrc_cache.h>
#include <console/console.h>
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index ca87d63..e079aad 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <bootstate.h>
-#include <cbmem.h>
#include "chip.h"
#include <console/console.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 3abc853..49edd03 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -22,7 +22,6 @@
#include <bootmode.h>
#include <console/console.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <cpu/x86/mtrr.h>
#include <elog.h>
#include <program_loading.h>
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index afb6038..7147750 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c
index 838a056..72361ff 100644
--- a/src/soc/intel/cannonlake/romstage/power_state.c
+++ b/src/soc/intel/cannonlake/romstage/power_state.c
@@ -16,7 +16,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 05dcb76..0cf8d8c 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -18,7 +18,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbfs.h>
-#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <device/device.h>
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index 6b72a0c..3df7f87 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -25,7 +25,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cbmem.h>
#include <romstage_handoff.h>
#include <delay.h>
#include <timer.h>
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index 6fa2192..7bde8d9 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/icelake/romstage/power_state.c b/src/soc/intel/icelake/romstage/power_state.c
index 3b6d5f2..17ed36a 100644
--- a/src/soc/intel/icelake/romstage/power_state.c
+++ b/src/soc/intel/icelake/romstage/power_state.c
@@ -15,7 +15,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 215b07c..cf9192e 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -20,7 +20,6 @@
#include <arch/stages.h>
#include <arch/early_variables.h>
#include <assert.h>
-#include <cbmem.h>
#include <chip.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index c90e392..6150dbd 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -15,7 +15,6 @@
#include <arch/io.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <delay.h>
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index d9137ad..f031741 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <delay.h>
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index a8f111b..a7c3550 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -19,7 +19,6 @@
#include <cpu/cpu.h>
#include <bootmode.h>
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <soc/nvidia/tegra/dc.h>
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index a00bdad..7b6134c 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -28,7 +28,6 @@
#include <string.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
-#include <cbmem.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra/types.h>
#include <soc/sor.h>
diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c
index eadbfc8..c0a2ed0 100644
--- a/src/soc/rockchip/rk3288/soc.c
+++ b/src/soc/rockchip/rk3288/soc.c
@@ -15,7 +15,6 @@
#include <arch/cache.h>
#include <bootmode.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/samsung/exynos5250/cpu.c b/src/soc/samsung/exynos5250/cpu.c
index 2196144..aed1114 100644
--- a/src/soc/samsung/exynos5250/cpu.c
+++ b/src/soc/samsung/exynos5250/cpu.c
@@ -15,7 +15,6 @@
*/
#include <arch/cache.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c
index cab23a6..ecda54b 100644
--- a/src/soc/samsung/exynos5420/cpu.c
+++ b/src/soc/samsung/exynos5420/cpu.c
@@ -15,7 +15,6 @@
*/
#include <arch/cache.h>
-#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c
index 75da9dd..da214a1 100644
--- a/src/southbridge/amd/agesa/hudson/early_setup.c
+++ b/src/southbridge/amd/agesa/hudson/early_setup.c
@@ -22,7 +22,6 @@
#include <console/console.h>
#include <reset.h>
#include <arch/cpu.h>
-#include <cbmem.h>
#include "hudson.h"
void hudson_pci_port80(void)
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 4fc473b..5d32a83 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <cbmem.h>
#include "hudson.h"
#include "imc.h"
#include "smbus.h"
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 9f8b3ab..7956961 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -17,7 +17,6 @@
#include "SBPLATFORM.h"
#include "cfg.h"
#include "OEM.h"
-#include <cbmem.h>
#include <arch/io.h>
#include <arch/acpi.h>
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 40c0739..2759af6 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -20,7 +20,6 @@
#include <arch/ioapic.h>
#include "lpc.h"
#include <arch/io.h>
-#include <cbmem.h>
void lpc_read_resources(struct device *dev)
{
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index 47d20af..99cad96 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -23,7 +23,6 @@
#include <console/console.h>
#include <reset.h>
#include <arch/cpu.h>
-#include <cbmem.h>
#include "hudson.h"
#include "pci_devs.h"
#include <Fch/Fch.h>
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index ecf041a..bf9cad0 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <cbmem.h>
#include "hudson.h"
#include "smbus.h"
#include "smi.h"
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 6569e39..857503a 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -28,7 +28,6 @@
#include <pc80/isa-dma.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <cbmem.h>
#include <cpu/amd/powernow.h>
#include "sb700.h"
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 1254a16..dbead5b 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <arch/cbfs.h>
#include <cbfs.h>
#include <ip_checksum.h>
diff --git a/src/southbridge/intel/bd82x6x/madt.c b/src/southbridge/intel/bd82x6x/madt.c
index afa15ae..e0026f5 100644
--- a/src/southbridge/intel/bd82x6x/madt.c
+++ b/src/southbridge/intel/bd82x6x/madt.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <cbmem.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de
Gerrit-Change-Number: 29302
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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