[coreboot-gerrit] Change in coreboot[master]: mainboard/google/kahlee: Setting PSPP to BalanceHigh

[Akshu Agrawal (Code Review)]

Akshu Agrawal has uploaded this change for review. ( https://review.coreboot.org/29282


Change subject: mainboard/google/kahlee: Setting PSPP to BalanceHigh
......................................................................

mainboard/google/kahlee: Setting PSPP to BalanceHigh

Without IOMMU and PsppBalanceLow audio does not work
and dma from sysmem to ACP sram gets stuck.
We cannot have IOMMU enabled for ST as it causes a siginificant
impact to performance and also can cause potential problems with ACP
as ACP IP uses fixed address offset.
Hence, setting to PsppBalanceHigh.

BUG=b:116553085
TEST=Playback audio

Change-Id: Ia7de98184063f5e52e52ac08f2b5d6446acdcb59
Signed-off-by: Akshu Agrawal <akshu.agrawal at amd.com>
---
M src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/29282/1

diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
index 42d9a49..11d75f2 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
@@ -149,7 +149,7 @@
 VOID __weak OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly)
 {
 	InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex;
-	InitEarly->GnbConfig.PsppPolicy = PsppBalanceLow;
+	InitEarly->GnbConfig.PsppPolicy = PsppBalanceHigh;
 	InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus;
 	InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth;
 }

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia7de98184063f5e52e52ac08f2b5d6446acdcb59
Gerrit-Change-Number: 29282
Gerrit-PatchSet: 1
Gerrit-Owner: Akshu Agrawal <akshu.agrawal at amd.com>
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