[coreboot-gerrit] Change in coreboot[master]: google/kukui: Support TPM

[Tristan Hsieh (Code Review)]

Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/29192


Change subject: google/kukui: Support TPM
......................................................................

google/kukui: Support TPM

Init SPI bus 0 for payload to connect TPM and set up GPIO table for TPM
interrupt.

BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui.

Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39
Signed-off-by: Tristan Shieh <tristan.shieh at mediatek.com>
---
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/kukui/bootblock.c
M src/mainboard/google/kukui/chromeos.c
M src/mainboard/google/kukui/gpio.h
4 files changed, 7 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29192/1

diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig
index 9e01464..a990064 100644
--- a/src/mainboard/google/kukui/Kconfig
+++ b/src/mainboard/google/kukui/Kconfig
@@ -21,6 +21,10 @@
 	string
 	default "Kukui"
 
+config TPM_SPI_BUS
+	hex
+	default 0x0
+
 config BOOT_DEVICE_SPI_FLASH_BUS
 	int
 	default 1
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
index 0728588..717b158 100644
--- a/src/mainboard/google/kukui/bootblock.c
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -33,6 +33,7 @@
 	/* Declare we are in S0 */
 	gpio_output(AP_IN_SLEEP_L, 1);
 
+	mtk_spi_init(CONFIG_TPM_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
 	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
 	mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);
 }
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c
index bb14b1c..44fd7f8 100644
--- a/src/mainboard/google/kukui/chromeos.c
+++ b/src/mainboard/google/kukui/chromeos.c
@@ -30,6 +30,7 @@
 	struct lb_gpio chromeos_gpios[] = {
 		{EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},
 		{EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
+		{CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"},
 	};
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
diff --git a/src/mainboard/google/kukui/gpio.h b/src/mainboard/google/kukui/gpio.h
index a2f7760..20a50a6 100644
--- a/src/mainboard/google/kukui/gpio.h
+++ b/src/mainboard/google/kukui/gpio.h
@@ -20,6 +20,7 @@
 
 #define EC_IRQ		GPIO(PERIPHERAL_EN1)
 #define EC_IN_RW	GPIO(PERIPHERAL_EN14)
+#define CR50_IRQ	GPIO(PERIPHERAL_EN3)
 
 void setup_chromeos_gpios(void);
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39
Gerrit-Change-Number: 29192
Gerrit-PatchSet: 1
Gerrit-Owner: Tristan Hsieh <tristan.shieh at mediatek.com>
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