[coreboot-gerrit] Change in coreboot[master]: nb/intel/nehalem: Remove unneeded whitespace
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Wed Oct 17 20:21:34 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29174
Change subject: nb/intel/nehalem: Remove unneeded whitespace
......................................................................
nb/intel/nehalem: Remove unneeded whitespace
Change-Id: I942a054144e05a3722c3743e445a879e86021dd4
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/intel/nehalem/early_init.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/29174/1
diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index c9acc8e..ac0ed45 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -106,7 +106,7 @@
if (!(result.eax & 0x2)) {
m = rdmsr(MSR_FSB_CLOCK_VCC);
reg8 = ((m.lo & 0xff00) >> 8) + 1;
- m = rdmsr (IA32_PERF_CTL);
+ m = rdmsr(IA32_PERF_CTL);
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
@@ -120,7 +120,7 @@
m = rdmsr(MSR_FSB_CLOCK_VCC);
reg8 = ((m.lo & 0xff00) >> 8) + 1;
- m = rdmsr (IA32_PERF_CTL);
+ m = rdmsr(IA32_PERF_CTL);
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I942a054144e05a3722c3743e445a879e86021dd4
Gerrit-Change-Number: 29174
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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