[coreboot-gerrit] Change in coreboot[master]: cpu/amd: Use common AMD's MSR
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Wed Oct 17 08:58:17 CEST 2018
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/29065 )
Change subject: cpu/amd: Use common AMD's MSR
......................................................................
Patch Set 16:
(8 comments)
https://review.coreboot.org/#/c/29065/16/src/cpu/amd/family_10h-family_15h/defaults.h
File src/cpu/amd/family_10h-family_15h/defaults.h:
https://review.coreboot.org/#/c/29065/16/src/cpu/amd/family_10h-family_15h/defaults.h@77
PS16, Line 77: { NB_CFG_MSR, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_DC | AMD_PTYPE_MC,
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https://review.coreboot.org/#/c/29065/16/src/cpu/amd/family_10h-family_15h/defaults.h@107
PS16, Line 107: 1 << 21, 0x00000000 }, /* Erratum #254 DR B1 BU_CFG_MSR[21]=1 */
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https://review.coreboot.org/#/c/29065/16/src/cpu/amd/family_10h-family_15h/defaults.h@118
PS16, Line 118: { CPU_ID_FEATURES_MSR, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_DC | AMD_PTYPE_MC,
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https://review.coreboot.org/#/c/29065/16/src/include/cpu/amd/msr.h
File src/include/cpu/amd/msr.h:
https://review.coreboot.org/#/c/29065/16/src/include/cpu/amd/msr.h@40
PS16, Line 40: #define PS_CTL_REG 0xC0010062 /* P-state Control Register */
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https://review.coreboot.org/#/c/29065/16/src/include/cpu/amd/msr.h@41
PS16, Line 41: #define PS_CMD_MASK_OFF 0xfffffff8 /* P-state Control Register CMD Mask OFF */
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https://review.coreboot.org/#/c/29065/16/src/include/cpu/amd/msr.h@43
PS16, Line 43: #define PS_MAX_REG 0xC0010068 /* Maximum P-State Register */
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https://review.coreboot.org/#/c/29065/16/src/include/cpu/amd/msr.h@44
PS16, Line 44: #define PS_MIN_REG 0xC0010064 /* Mimimum P-State Register */
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https://review.coreboot.org/#/c/29065/16/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
File src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c:
https://review.coreboot.org/#/c/29065/16/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c@672
PS16, Line 672: wrmsr(HWCR_MSR, msr); /* Setting wrap32dis allows 64-bit memory references in real mode */
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Gerrit-Change-Number: 29065
Gerrit-PatchSet: 16
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel at silverbackltd.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Marc Jones <marc at marcjonesconsulting.com>
Gerrit-Comment-Date: Wed, 17 Oct 2018 06:58:17 +0000
Gerrit-HasComments: Yes
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