[coreboot-gerrit] Change in coreboot[master]: riscv: add support smp_pause / smp_resume

[Xiang Wang (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/29023

to look at the new patch set (#2).

Change subject: riscv: add support smp_pause / smp_resume
......................................................................

riscv: add support smp_pause / smp_resume

See https://doc.coreboot.org/arch/riscv/ we know that we need to execute
smp_pause at the start of each stage and smp_resume at the end of each
stage.

Change-Id: I6f8159637bfb15f54f0abeb335de2ba6e9cf82fb
Signed-off-by: Xiang Wang <wxjstz at 126.com>
---
M src/arch/riscv/Kconfig
A src/arch/riscv/include/arch/smp/smp.h
M src/arch/riscv/include/mcall.h
3 files changed, 64 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/29023/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I6f8159637bfb15f54f0abeb335de2ba6e9cf82fb
Gerrit-Change-Number: 29023
Gerrit-PatchSet: 2
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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