[coreboot-gerrit] Change in coreboot[master]: WIP: riscv: drop .data/.bss from bootblock

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28977 )

Change subject: WIP: riscv: drop .data/.bss from bootblock
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Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/28977/2/src/arch/riscv/misaligned.c
File src/arch/riscv/misaligned.c:

https://review.coreboot.org/#/c/28977/2/src/arch/riscv/misaligned.c@139
PS2, Line 139: static const struct memory_instruction_info *match_instruction(const uintptr_t insn)
line over 80 characters



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I61f9610ed11379e42b6696beffef6e4ca2e72dbd
Gerrit-Change-Number: 28977
Gerrit-PatchSet: 2
Gerrit-Owner: Philipp Hug <philipp at hug.cx>
Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Gerrit-Reviewer: Philipp Hug <philipp at hug.cx>
Gerrit-Reviewer: Ronald G. Minnich <rminnich at gmail.com>
Gerrit-Reviewer: Xiang Wang <wxjstz at 126.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 09 Oct 2018 13:30:42 +0000
Gerrit-HasComments: Yes
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