[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add back PM TIMER EMULATION

Lijian Zhao (Code Review) gerrit at coreboot.org
Fri Oct 5 20:59:58 CEST 2018


Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/28937 )

Change subject: soc/intel/cannonlake: Add back PM TIMER EMULATION
......................................................................


Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/28937/2/src/soc/intel/cannonlake/include/soc/msr.h
File src/soc/intel/cannonlake/include/soc/msr.h:

https://review.coreboot.org/#/c/28937/2/src/soc/intel/cannonlake/include/soc/msr.h@24
PS2, Line 24:  
> is this extra space?
Usually people have an extra space to differentiate a whole register and register bit under, I can take that out to avoid confusion.



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ie069e815e6244c3f85fabf51e186311621d316fd
Gerrit-Change-Number: 28937
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
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