[coreboot-gerrit] Change in coreboot[master]: libpayload/apic: Only ACK interrupts triggered by the APIC

Martin Roth (Code Review) gerrit at coreboot.org
Thu Oct 4 17:24:24 CEST 2018


Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/28879 )

Change subject: libpayload/apic: Only ACK interrupts triggered by the APIC
......................................................................

libpayload/apic: Only ACK interrupts triggered by the APIC

Only set end of interrupt (EOI) when the APIC In-Service vector matches
the interrupt vector. This makes it so we don't EOI a non APIC
interrupt.

BUG=b:116777191
TEST=Booted grunt with APIC enabled and verified depthcharge still
works.

Change-Id: I00bd1e7a0fcf2fc004feadc40d22ebfefe68b384
Signed-off-by: Raul E Rangel <rrangel at chromium.org>
Reviewed-on: https://review.coreboot.org/28879
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Martin Roth <martinroth at google.com>
---
M payloads/libpayload/arch/x86/apic.c
M payloads/libpayload/arch/x86/exception.c
M payloads/libpayload/include/x86/arch/apic.h
3 files changed, 27 insertions(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Martin Roth: Looks good to me, approved



diff --git a/payloads/libpayload/arch/x86/apic.c b/payloads/libpayload/arch/x86/apic.c
index 048cc66..3b294cb 100644
--- a/payloads/libpayload/arch/x86/apic.c
+++ b/payloads/libpayload/arch/x86/apic.c
@@ -58,6 +58,8 @@
 #define APIC_TIMER_INIT_COUNT		0x380
 #define APIC_TIMER_CUR_COUNT		0x390
 #define APIC_TIMER_DIV_CFG		0x3E0
+#define APIC_ISR_0			0x100
+#define APIC_ISR_OFFSET			0x010
 
 #define APIC_LVT_SIZE			0x010
 
@@ -141,11 +143,28 @@
 	timer_waiting = 0;
 }
 
-void apic_eoi(void)
+void apic_eoi(uint8_t vector)
 {
 	die_if(!apic_bar, "APIC is not initialized");
 
-	apic_write32(APIC_EOI, 0);
+	/*
+	 * Local and I/O APICs support 240 vectors (in the range of 16 to 255)
+	 * as valid interrupts.
+	 */
+	if (vector <= 15)
+		return;
+
+	/* Each bank handles 32 vectors */
+	uint8_t bank = vector / 32;
+
+	uint32_t offset = APIC_ISR_0 + bank * APIC_ISR_OFFSET;
+
+	uint32_t mask = apic_read32(offset);
+
+	uint8_t shift = vector % 32;
+
+	if (mask & (1 << shift))
+		apic_write32(APIC_EOI, 0);
 }
 
 static enum APIC_CAPABILITY apic_capabilities(void)
diff --git a/payloads/libpayload/arch/x86/exception.c b/payloads/libpayload/arch/x86/exception.c
index 2691c85..3cd95bb 100644
--- a/payloads/libpayload/arch/x86/exception.c
+++ b/payloads/libpayload/arch/x86/exception.c
@@ -34,13 +34,6 @@
 #include <arch/apic.h>
 
 #define IF_FLAG				(1 << 9)
-/*
- * Local and I/O APICs support 240 vectors (in the range of 16 to 255) as valid
- * interrupts. The Intel 64 and IA-32 architectures reserve vectors 16
- * through 31 for predefined interrupts, exceptions, and Intel-reserved
- * encodings.
-*/
-#define FIRST_USER_DEFINED_VECTOR	32
 
 u32 exception_stack[0x400] __attribute__((aligned(8)));
 
@@ -173,15 +166,15 @@
 
 void exception_dispatch(void)
 {
-	u32 vec = exception_state->vector;
+	die_if(exception_state->vector >= ARRAY_SIZE(handlers),
+	       "Invalid vector %u\n", exception_state->vector);
 
-	die_if(vec >= ARRAY_SIZE(handlers), "Invalid vector %u\n", vec);
+	u8 vec = exception_state->vector;
 
 	if (handlers[vec]) {
 		handlers[vec](vec);
-		if (IS_ENABLED(CONFIG_LP_ENABLE_APIC)
-				&& vec >= FIRST_USER_DEFINED_VECTOR)
-			apic_eoi();
+		if (IS_ENABLED(CONFIG_LP_ENABLE_APIC))
+			apic_eoi(vec);
 		return;
 	}
 
diff --git a/payloads/libpayload/include/x86/arch/apic.h b/payloads/libpayload/include/x86/arch/apic.h
index c28fc0f..1eb3508 100644
--- a/payloads/libpayload/include/x86/arch/apic.h
+++ b/payloads/libpayload/include/x86/arch/apic.h
@@ -38,7 +38,7 @@
 uint8_t apic_id(void);
 
 /** Signal the end of the interrupt handler. */
-void apic_eoi(void);
+void apic_eoi(uint8_t vector);
 
 void apic_delay(unsigned int usec);
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I00bd1e7a0fcf2fc004feadc40d22ebfefe68b384
Gerrit-Change-Number: 28879
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel <rrangel at chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Raul Rangel <rrangel at chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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