[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP addresse

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/28847 )

Change subject: src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP addresse
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Patch Set 4:

I agree to the change but I think somebody at Intel should really
investigate what the processor supports and what MSRs exist. It looks
like the configure_dca_cap() function is plain copy-pasta, I traced
it back to Sandybridge. But it was already there implemented wrong
anyway if you compare it to the BWG. I also have doubts if there ever
was any Intel processor with DCA supported by coreboot.


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Id4f99e82bb97a260d654b49a2ba94fde207d318b
Gerrit-Change-Number: 28847
Gerrit-PatchSet: 4
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Mon, 01 Oct 2018 13:42:50 +0000
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