[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Enable S4 sleep state support

PraveenX Hodagatta Pranesh (Code Review) gerrit at coreboot.org
Mon Oct 1 08:13:28 CEST 2018


PraveenX Hodagatta Pranesh has uploaded this change for review. ( https://review.coreboot.org/28846


Change subject: soc/intel/cannonlake: Enable S4 sleep state support
......................................................................

soc/intel/cannonlake: Enable S4 sleep state support

Add ACPI entry in sleepstates.asl to support S4(hibernate).

TEST:boot to Windows on CFL RVP11 & RVP8, verified hibernate functionality.

Change-Id: I751c774e6ec7fd89ac3af5a619033bd38a759281
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh at intel.com>
---
M src/soc/intel/cannonlake/acpi/sleepstates.asl
1 file changed, 2 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/28846/1

diff --git a/src/soc/intel/cannonlake/acpi/sleepstates.asl b/src/soc/intel/cannonlake/acpi/sleepstates.asl
index d19f080..2d84a66 100644
--- a/src/soc/intel/cannonlake/acpi/sleepstates.asl
+++ b/src/soc/intel/cannonlake/acpi/sleepstates.asl
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2017 Intel Corp.
+ * Copyright (C) 2018 Intel Corp.
  *
  *
  * This program is free software; you can redistribute it and/or modify
@@ -17,4 +17,5 @@
 
 Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 })
 Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 })
+Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 })
 Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 })

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I751c774e6ec7fd89ac3af5a619033bd38a759281
Gerrit-Change-Number: 28846
Gerrit-PatchSet: 1
Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh at intel.com>
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