[coreboot-gerrit] Change in ...coreboot[master]: [TESTME]soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE

[Huang Jin (Code Review)]

Huang Jin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29910 )

Change subject: [TESTME]soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE
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Patch Set 1:

Hey Arthur,

Thanks for saving Baytrail FSP ... Appreciate it. I'd like to test your change on a Baytrail board but I don't have one at the moment. 

Please allow me some time to set it up. If someone else can verify the change, go ahead do so.

Thanks,
Aaron


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I206f879f1d944c0a5e4e62ac4d2328889bc2b4ce
Gerrit-Change-Number: 29910
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Huang Jin <huang.jin at intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: York Yang <york.yang at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Thu, 29 Nov 2018 03:00:32 +0000
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