[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/braswell: Rework acpi/cpu.asl

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29889


Change subject: soc/intel/braswell: Rework acpi/cpu.asl
......................................................................

soc/intel/braswell: Rework acpi/cpu.asl

Change-Id: I93c11e89da34c5432c6ce0415998b47bad339763
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/soc/intel/braswell/acpi.c
M src/soc/intel/braswell/acpi/cpu.asl
2 files changed, 23 insertions(+), 43 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/29889/1

diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index e791072..191eccf 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -448,6 +448,23 @@
 
 		acpigen_pop_len();
 	}
+
+	/* PPKG is usually used for thermal management
+	   of the first and only package. */
+	acpigen_write_processor_package("PPKG", 0, pattrs->num_cpus);
+
+	/* Add a method to notify processor nodes */
+	acpigen_write_method("\\_PR.CNOT", 1);
+	for (core = 0; core < pattrs->num_cpus; coreID++) {
+		char buffer[DEVICE_PATH_MAX];
+		snprintf(buffer, sizeof(buffer), "\\_PR.CP%c%c",
+			 '0' + core / 10, '0' + core % 10);
+		acpigen_emit_byte(NOTIFY_OP);
+		acpigen_emit_namestring(buffer);
+		acpigen_emit_byte(ARG0_OP);
+	}
+	acpigen_pop_len();
+
 }
 
 unsigned long acpi_madt_irq_overrides(unsigned long current)
diff --git a/src/soc/intel/braswell/acpi/cpu.asl b/src/soc/intel/braswell/acpi/cpu.asl
index 8bfd632..775b32f 100644
--- a/src/soc/intel/braswell/acpi/cpu.asl
+++ b/src/soc/intel/braswell/acpi/cpu.asl
@@ -14,60 +14,23 @@
  * GNU General Public License for more details.
  */
 
-/* These devices are created at runtime */
-External (\_PR.CP00, DeviceObj)
-External (\_PR.CP01, DeviceObj)
-External (\_PR.CP02, DeviceObj)
-External (\_PR.CP03, DeviceObj)
-
+/* These come from the dynamically created CPU SSDT */
+External (\_PR.CNOT, MethodObj)
 
 /* Notify OS to re-read CPU tables, assuming ^2 CPU count */
 Method (PNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x81)  /* _CST */
-		Notify (\_PR.CP01, 0x81)  /* _CST */
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x81)  /* _CST */
-		Notify (\_PR.CP03, 0x81)  /* _CST */
-	}
+	\_PR.CNOT (0x81)
 }
 
 /* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
 Method (PPCN)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x80)  /* _PPC */
-		Notify (\_PR.CP01, 0x80)  /* _PPC */
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x80)  /* _PPC */
-		Notify (\_PR.CP03, 0x80)  /* _PPC */
-	}
+	\_PR.CNOT (0x81)
 }
 
 /* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
 Method (TNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x82)  /* _TPC */
-		Notify (\_PR.CP01, 0x82)  /* _TPC */
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x82)  /* _TPC */
-		Notify (\_PR.CP03, 0x82)  /* _TPC */
-	}
-}
-
-/* Return a package containing enabled processor entries */
-Method (PPKG)
-{
-	If (LGreaterEqual (\PCNT, 4)) {
-		Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
-	} ElseIf (LGreaterEqual (\PCNT, 2)) {
-		Return (Package() {\_PR.CP00, \_PR.CP01})
-	} Else {
-		Return (Package() {\_PR.CP00})
-	}
-}
+	\_PR.CNOT (0x82)
+}
\ No newline at end of file

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I93c11e89da34c5432c6ce0415998b47bad339763
Gerrit-Change-Number: 29889
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-MessageType: newchange
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