[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Remove CPU ACPI code

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29756


Change subject: soc/intel/cannonlake: Remove CPU ACPI code
......................................................................

soc/intel/cannonlake: Remove CPU ACPI code

Remove the cannonlake-specific CPU ACPI code and instead use
the newly added common CPU ACPI code.

Change-Id: Id526dc503f278b5cf3a8ce5ccec6f751aa777df0
Signed-off-by: Duncan Laurie <dlaurie at google.com>
---
D src/soc/intel/cannonlake/acpi/cpu.asl
1 file changed, 0 insertions(+), 43 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/29756/1

diff --git a/src/soc/intel/cannonlake/acpi/cpu.asl b/src/soc/intel/cannonlake/acpi/cpu.asl
deleted file mode 100644
index 79314e6..0000000
--- a/src/soc/intel/cannonlake/acpi/cpu.asl
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These devices are created at runtime */
-External (\_PR.CP00, DeviceObj)
-External (\_PR.CP01, DeviceObj)
-External (\_PR.CP02, DeviceObj)
-External (\_PR.CP03, DeviceObj)
-External (\_PR.CP04, DeviceObj)
-External (\_PR.CP05, DeviceObj)
-External (\_PR.CP06, DeviceObj)
-External (\_PR.CP07, DeviceObj)
-
-/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
-Method (PNOT)
-{
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CP00, 0x81)  // _CST
-		Notify (\_PR.CP01, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CP02, 0x81)  // _CST
-		Notify (\_PR.CP03, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CP04, 0x81)  // _CST
-		Notify (\_PR.CP05, 0x81)  // _CST
-		Notify (\_PR.CP06, 0x81)  // _CST
-		Notify (\_PR.CP07, 0x81)  // _CST
-	}
-}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id526dc503f278b5cf3a8ce5ccec6f751aa777df0
Gerrit-Change-Number: 29756
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-MessageType: newchange
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