[coreboot-gerrit] Change in coreboot[master]: soc/drivers/intel/fsp1_1: Report returned status of FspTempRamInit() ...
Frans Hendriks (Code Review)
gerrit at coreboot.org
Tue Nov 20 08:11:56 CET 2018
Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/29695
Change subject: soc/drivers/intel/fsp1_1: Report returned status of FspTempRamInit() always.
......................................................................
soc/drivers/intel/fsp1_1: Report returned status of FspTempRamInit() always.
Returned status code FspTempRamInit() is not displayed when error occurs.
Move the printk() call before the check for status.
BUG=NA
TEST=Portwell PQ7-M107
Change-Id: Id87e5c765d09f4ab199db9eba07a949b031a709a
Signed-off-by: Frans Hendriks <fhendriks at eltan.com>
---
M src/drivers/intel/fsp1_1/bootblock.c
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/29695/1
diff --git a/src/drivers/intel/fsp1_1/bootblock.c b/src/drivers/intel/fsp1_1/bootblock.c
index cf9e134..ce367f7 100644
--- a/src/drivers/intel/fsp1_1/bootblock.c
+++ b/src/drivers/intel/fsp1_1/bootblock.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Intel Corporation.
+ * Copryight (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -51,8 +52,8 @@
fsp_temp_ram_init = (FSP_TEMP_RAM_INIT)(fih->ImageBase
+ fih->TempRamInitEntryOffset);
status = fsp_temp_ram_init(&temp_ram_init_params);
+ printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status);
if (status != FSP_SUCCESS)
die("FspTempRamInit failed. Giving up.");
- printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status);
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id87e5c765d09f4ab199db9eba07a949b031a709a
Gerrit-Change-Number: 29695
Gerrit-PatchSet: 1
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
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