[coreboot-gerrit] Change in coreboot[master]: nb/intel/gm45/northbridge.c: Check for NULL pointers

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/29688


Change subject: nb/intel/gm45/northbridge.c: Check for NULL pointers
......................................................................

nb/intel/gm45/northbridge.c: Check for NULL pointers

Change-Id: Ic12a8c145d6348086f9931af93ce6d3b3dcb9039
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/gm45/northbridge.c
1 file changed, 12 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/29688/1

diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index a738905..0fd7fe5 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -228,14 +228,23 @@
 
 u32 northbridge_get_tseg_size(void)
 {
-	const u8 esmramc = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)),
-					D0F0_ESMRAMC);
+	struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+
+	if (dev == NULL)
+		die("could not find pci 00:00.0!\n");
+
+	const u8 esmramc = pci_read_config8(dev, D0F0_ESMRAMC);
 	return decode_tseg_size(esmramc) << 10;
 }
 
 void northbridge_write_smram(u8 smram)
 {
-	pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_SMRAM, smram);
+	struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+
+	if (dev == NULL)
+		die("could not find pci 00:00.0!\n");
+
+	pci_write_config8(dev, D0F0_SMRAM, smram);
 }
 
 /*

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic12a8c145d6348086f9931af93ce6d3b3dcb9039
Gerrit-Change-Number: 29688
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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