[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/29662 )

Change subject: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/29662/1/src/drivers/intel/fsp1_1/cache_as_ram_cbootblock.S
File src/drivers/intel/fsp1_1/cache_as_ram_cbootblock.S:

https://review.coreboot.org/#/c/29662/1/src/drivers/intel/fsp1_1/cache_as_ram_cbootblock.S@179
PS1, Line 179: 	 * 0x0E - FSP_NOT_FOUND: No valid microcode was found in the microcode region.
line over 80 characters



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c
Gerrit-Change-Number: 29662
Gerrit-PatchSet: 1
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Fri, 16 Nov 2018 14:30:39 +0000
Gerrit-HasComments: Yes
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