[coreboot-gerrit] Change in coreboot[master]: cpu/intel/fsp_model_406dx: Remove unused FSP_MODEL_406DX_{A1, B0}

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29618


Change subject: cpu/intel/fsp_model_406dx: Remove unused FSP_MODEL_406DX_{A1,B0}
......................................................................

cpu/intel/fsp_model_406dx: Remove unused FSP_MODEL_406DX_{A1,B0}

Change-Id: I12ca33756c7d197de22d307448e27a504678537c
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/cpu/intel/fsp_model_406dx/Kconfig
1 file changed, 0 insertions(+), 12 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/29618/1

diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index 4c79b23..bbca22f 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -37,18 +37,6 @@
 	# Microcode header files are delivered in FSP package
 	select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN
 
-choice
-	prompt "Rangeley CPU Stepping"
-	default FSP_MODEL_406DX_B0
-
-config FSP_MODEL_406DX_A1
-	bool "A1"
-
-config FSP_MODEL_406DX_B0
-	bool "B0"
-
-endchoice
-
 config BOOTBLOCK_CPU_INIT
 	string
 	default "cpu/intel/fsp_model_406dx/bootblock.c"

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I12ca33756c7d197de22d307448e27a504678537c
Gerrit-Change-Number: 29618
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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