[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x/raminit: Add missing space

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/29346 )

Change subject: nb/intel/x4x/raminit: Add missing space
......................................................................

nb/intel/x4x/raminit: Add missing space

TEST=Make the printk reachable, check with
     `strings build/cbfs/fallback/romstage.elf | grep lowest`
     that this patch changes "MHzas" to "MHz as".

Change-Id: I42033d2f184e424818edf844cf6cf84ea07d7ed5
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Reviewed-on: https://review.coreboot.org/29346
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
---
M src/northbridge/intel/x4x/raminit.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved



diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 80bde6c..ff1f970 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -304,7 +304,7 @@
 	min_tCLK = MAX(min_tCLK, saved_timings->min_tclk);
 	if (min_tCLK == 0) {
 		printk(BIOS_ERR, "DRAM frequency is under lowest supported "
-			"frequency (400 MHz). Increasing to 400 MHz"
+			"frequency (400 MHz). Increasing to 400 MHz "
 			"as last resort");
 		min_tCLK = TCK_400MHZ;
 	}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I42033d2f184e424818edf844cf6cf84ea07d7ed5
Gerrit-Change-Number: 29346
Gerrit-PatchSet: 3
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Gerrit-Reviewer: Angel Pons <th3fanbus at gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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