[coreboot-gerrit] Change in coreboot[master]: mediatek/mt8183: Add MT6358 PMIC support
Tristan Hsieh (Code Review)
gerrit at coreboot.org
Thu Nov 1 11:54:13 CET 2018
Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/29422
Change subject: mediatek/mt8183: Add MT6358 PMIC support
......................................................................
mediatek/mt8183: Add MT6358 PMIC support
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: Ic247faf73517f6512f9c9a69ba0254c749d68d4c
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang at mediatek.com>
---
M src/soc/mediatek/mt8183/Makefile.inc
A src/soc/mediatek/mt8183/include/soc/mt6358.h
A src/soc/mediatek/mt8183/mt6358.c
M src/soc/mediatek/mt8183/soc.c
4 files changed, 444 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/29422/1
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index e8efe90..d79b487 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -34,7 +34,7 @@
ramstage-y += ../common/gpio.c gpio.c
ramstage-y += ../common/mmu_operations.c mmu_operations.c
ramstage-y += ../common/mtcmos.c mtcmos.c
-ramstage-y += ../common/pmic_wrap.c pmic_wrap.c
+ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c
ramstage-y += soc.c
ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
ramstage-y += ../common/timer.c
diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h
new file mode 100644
index 0000000..c23ee38
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MEDIATEK_MT6358_H__
+#define __SOC_MEDIATEK_MT6358_H__
+
+enum {
+ PMIC_SWCID = 0x000A,
+ PMIC_VM_MODE = 0x004e,
+ PMIC_TOP_RST_MISC = 0x014C,
+ PMIC_TOP_RST_MISC_SET = 0x014E,
+ PMIC_TOP_RST_MISC_CLR = 0x0150,
+ PMIC_TOP_TMA_KEY = 0x03A8,
+ PMIC_PWRHOLD = 0x0A08,
+ PMIC_CPSDSA4 = 0x0A2E,
+ PMIC_VDRAM1_VOSEL_SLEEP = 0x160a,
+ PMIC_SMPS_ANA_CON0 = 0x1808,
+};
+
+struct pmic_setting {
+ unsigned short addr;
+ unsigned short val;
+ unsigned short mask;
+ unsigned char shift;
+};
+
+void mt6358_init(void);
+u16 pmic_read_interface(u16 reg, u16 mask, u16 shift);
+void pmic_config_interface(u16 reg, u16 val, u16 mask, u16 shift);
+void pmic_set_power_hold(bool enable);
+#endif /* __SOC_MEDIATEK_MT6358_H__ */
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
new file mode 100644
index 0000000..3c2effd
--- /dev/null
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -0,0 +1,398 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <assert.h>
+#include <soc/pmic_wrap.h>
+#include <soc/mt6358.h>
+
+static struct pmic_setting init_setting[] = {
+ {0x03A8, 0x9CA7, 0xFFFF, 0},
+ {0x1E, 0xA, 0xA, 0},
+ {0x22, 0x1F00, 0x1F00, 0},
+ {0x2E, 0x1, 0x1, 0},
+ {0x30, 0x1, 0x1, 0},
+ {0x36, 0x8888, 0xFFFF, 0},
+ {0x3A, 0x8888, 0xFFFF, 0},
+ {0x3C, 0x8888, 0xFFFF, 0},
+ {0x3E, 0x888, 0xFFF, 0},
+ {0x94, 0x0, 0xFFFF, 0},
+ {0x10C, 0x18, 0x18, 0},
+ {0x112, 0x4, 0x4, 0},
+ {0x118, 0x8, 0x8, 0},
+ {0x12A, 0x100, 0x180, 0},
+ {0x134, 0x80, 0x2890, 0},
+ {0x14C, 0x20, 0x20, 0},
+ {0x198, 0x0, 0x1FF, 0},
+ {0x790, 0x280, 0x780, 0},
+ {0x7AC, 0x0, 0x2000, 0},
+ {0x98A, 0x40, 0x40, 0},
+ {0xA08, 0x1, 0x1, 0},
+ {0xA38, 0x0, 0x100, 0},
+ {0xA3C, 0x81E0, 0x81E0, 0},
+ {0xA44, 0xFFFF, 0xFFFF, 0},
+ {0xA46, 0xE000, 0xE000, 0},
+ {0xA62, 0x400, 0x400, 0},
+ {0xC8A, 0x4, 0xC, 0},
+ {0xF8C, 0xAAA, 0xAAA, 0},
+ {0x1188, 0x0, 0x8000, 0},
+ {0x119E, 0x6000, 0x7000, 0},
+ {0x11A2, 0x0, 0x3000, 0},
+ {0x11B0, 0x4000, 0x4000, 0},
+ {0x11B4, 0x0, 0x100, 0},
+ {0x123A, 0x8040, 0x83FF, 0},
+ {0x123E, 0x4, 0x4, 0},
+ {0x1242, 0x1, 0x1, 0},
+ {0x1260, 0x0, 0x154, 0},
+ {0x1312, 0x8, 0x8, 0},
+ {0x1334, 0x0, 0x100, 0},
+ {0x1346, 0x100, 0x100, 0},
+ {0x138A, 0x10, 0x7F, 0},
+ {0x138C, 0x15, 0x7F, 0},
+ {0x138E, 0x1030, 0x3030, 0},
+ {0x140A, 0x10, 0x7F, 0},
+ {0x140C, 0x15, 0x7F, 0},
+ {0x140E, 0x1030, 0x3030, 0},
+ {0x148A, 0x10, 0x7F, 0},
+ {0x148E, 0x1030, 0x3030, 0},
+ {0x14A2, 0x20, 0x20, 0},
+ {0x150A, 0x10, 0x7F, 0},
+ {0x150E, 0x1030, 0x3030, 0},
+ {0x158A, 0x8, 0x7F, 0},
+ {0x158C, 0x90C, 0x7F7F, 0},
+ {0x158E, 0x1030, 0x3030, 0},
+ {0x159C, 0x8, 0xC, 0},
+ {0x15A2, 0x20, 0x20, 0},
+ {0x168A, 0x50, 0x7F, 0},
+ {0x168C, 0x1964, 0x7F7F, 0},
+ {0x168E, 0x2020, 0x3030, 0},
+ {0x16A2, 0x20, 0x20, 0},
+ {0x16AA, 0x48, 0x7F, 0},
+ {0x170C, 0x1964, 0x7F7F, 0},
+ {0x170E, 0x2020, 0x3030, 0},
+ {0x172A, 0x3C, 0x7F, 0},
+ {0x178C, 0x202, 0x7F7F, 0},
+ {0x178E, 0x70, 0x73, 0},
+ {0x1790, 0xC, 0xC, 0},
+ {0x1798, 0x2810, 0x3F3F, 0},
+ {0x179A, 0x800, 0x3F00, 0},
+ {0x179E, 0x1, 0x1, 0},
+ {0x1808, 0x2000, 0x3000, 0},
+ {0x180C, 0x60, 0x60, 0},
+ {0x1814, 0x3FF0, 0x7FFF, 0},
+ {0x1816, 0x3, 0x7, 0},
+ {0x181A, 0x6081, 0xFFBF, 0},
+ {0x181C, 0x503, 0x787, 0},
+ {0x181E, 0xA662, 0xFFFF, 0},
+ {0x1820, 0xA662, 0xFFFF, 0},
+ {0x1824, 0xDB6, 0xFFF, 0},
+ {0x1828, 0x160, 0x160, 0},
+ {0x1830, 0x3FF0, 0x7FFF, 0},
+ {0x1832, 0x3, 0x7, 0},
+ {0x1836, 0x6081, 0xFFBF, 0},
+ {0x1838, 0x503, 0x787, 0},
+ {0x183A, 0xA262, 0xFFFF, 0},
+ {0x183C, 0xA262, 0xFFFF, 0},
+ {0x1840, 0xDB6, 0xFFF, 0},
+ {0x1854, 0x0, 0x7, 0},
+ {0x1856, 0x0, 0x1C00, 0},
+ {0x185C, 0x0, 0x7, 0},
+ {0x185E, 0x0, 0x1C00, 0},
+ {0x1888, 0x420, 0xE7C, 0},
+ {0x188A, 0x801, 0x3C07, 0},
+ {0x188C, 0x1F, 0x3F, 0},
+ {0x188E, 0x129A, 0xFFFF, 0},
+ {0x1894, 0x58, 0x1F8, 0},
+ {0x1896, 0x1C, 0x7C, 0},
+ {0x1898, 0x1805, 0x3C07, 0},
+ {0x189A, 0xF, 0xF, 0},
+ {0x189C, 0x221A, 0xFFFF, 0},
+ {0x18A0, 0x2E, 0x3F, 0},
+ {0x18A2, 0x0, 0x40, 0},
+ {0x18A4, 0x2C06, 0x3C07, 0},
+ {0x18A6, 0xF, 0xF, 0},
+ {0x18A8, 0x221A, 0xFFFF, 0},
+ {0x18AC, 0x2E, 0x3F, 0},
+ {0x18AE, 0x0, 0x40, 0},
+ {0x18B0, 0x1805, 0x3C07, 0},
+ {0x18B2, 0xF, 0xF, 0},
+ {0x18B4, 0x221A, 0xFFFF, 0},
+ {0x18B8, 0x2E, 0x3F, 0},
+ {0x18BC, 0x50, 0x4F0, 0},
+ {0x18BE, 0x3C, 0xFC, 0},
+ {0x18C0, 0x0, 0x300, 0},
+ {0x18C2, 0x8886, 0xFFFF, 0},
+ {0x18D8, 0x700, 0xF00, 0},
+ {0x1A0E, 0x3, 0x3, 0},
+ {0x1A10, 0x1, 0x1, 0},
+ {0x1A12, 0x0, 0x1, 0},
+ {0x1A14, 0x0, 0x1, 0},
+ {0x1A16, 0x0, 0x1, 0},
+ {0x1A18, 0x0, 0x1, 0},
+ {0x1A1A, 0x0, 0x1, 0},
+ {0x1A1C, 0x0, 0x1, 0},
+ {0x1A1E, 0x0, 0x1, 0},
+ {0x1A20, 0x0, 0x1, 0},
+ {0x1A22, 0x0, 0x1, 0},
+ {0x1A24, 0x0, 0x1, 0},
+ {0x1A26, 0x0, 0x1, 0},
+ {0x1A28, 0x0, 0x1, 0},
+ {0x1A2A, 0x0, 0x1, 0},
+ {0x1A2C, 0x0, 0x1, 0},
+ {0x1A2E, 0x0, 0x1, 0},
+ {0x1A30, 0x0, 0x1, 0},
+ {0x1A32, 0x0, 0x1, 0},
+ {0x1A34, 0x0, 0x1, 0},
+ {0x1A36, 0x0, 0x1, 0},
+ {0x1A38, 0x0, 0x1, 0},
+ {0x1A3A, 0x0, 0x1, 0},
+ {0x1A3C, 0x0, 0x1, 0},
+ {0x1A3E, 0x0, 0x1, 0},
+ {0x1A40, 0x0, 0x1, 0},
+ {0x1A42, 0x0, 0x1, 0},
+ {0x1A44, 0x0, 0x1, 0},
+ {0x1A46, 0x0, 0x1, 0},
+ {0x1A48, 0x0, 0x1, 0},
+ {0x1A4A, 0x0, 0x1, 0},
+ {0x1A4C, 0x0, 0x1, 0},
+ {0x1A4E, 0x0, 0x1, 0},
+ {0x1B48, 0x10, 0x7F, 0},
+ {0x1B4A, 0xF15, 0x7F7F, 0},
+ {0x1B8A, 0x10, 0x7F, 0},
+ {0x1B8C, 0xF15, 0x7F7F, 0},
+ {0x1BA8, 0x38, 0x7F, 0},
+ {0x1BAA, 0x70F, 0x7F7F, 0},
+ {0x1BAC, 0x0, 0x3, 0},
+ {0x1BCA, 0x10, 0x7F, 0},
+ {0x1BCC, 0x70F, 0x7F7F, 0},
+ {0x1EA2, 0x1B, 0x1F, 0},
+ {0x1EA4, 0xC00, 0x1C00, 0},
+ {0x1EA6, 0xC00, 0x1C00, 0},
+ {0x1EA8, 0xC00, 0x1C00, 0},
+ {0x03A8, 0x0, 0xFFFF, 0},
+
+ /* MT6358 HW tracking init */
+ {0x1B66, 0x1000, 0x7F7F, 0},
+ {0x1B68, 0x6340, 0x7F7F, 0},
+ {0x1B64, 0x6, 0x6, 0},
+ {0x1B6E, 0x1000, 0x7F7F, 0},
+ {0x1B70, 0x6340, 0x7F7F, 0},
+ {0x1B6C, 0x6, 0x6, 0},
+};
+
+static struct pmic_setting lp_setting[] = {
+ /* Suspend */
+ {0x1390, 0x1, 0x1, 0},
+ {0x1490, 0x1, 0x1, 0},
+ {0x1510, 0x1, 0x1, 0},
+ {0x1590, 0x1, 0x1, 0},
+ {0x1690, 0x1, 0x1, 0},
+ {0x1710, 0x1, 0x1, 1},
+ {0x1716, 0x1, 0x1, 1},
+ {0x1610, 0x1, 0x1, 1},
+ {0x1616, 0x1, 0x1, 1},
+ {0x1410, 0x1, 0x1, 0},
+ {0x1BD0, 0x1, 0x1, 0},
+ {0x1BAE, 0x1, 0x1, 1},
+ {0x1BB4, 0x1, 0x1, 1},
+ {0x1B4E, 0x1, 0x1, 0},
+ {0x1A8A, 0x1, 0x1, 1},
+ {0x1A90, 0x1, 0x1, 1},
+ {0x1C1E, 0x1, 0x1, 2},
+ {0x1C24, 0x0, 0x1, 2},
+ {0x1C32, 0x1, 0x1, 2},
+ {0x1C38, 0x0, 0x1, 2},
+ {0x1C46, 0x1, 0x1, 0},
+ {0x1D1E, 0x1, 0x1, 0},
+ {0x1D1E, 0x1, 0x1, 0},
+ {0x1D8A, 0x1, 0x1, 0},
+ {0x1C5A, 0x1, 0x1, 0},
+ {0x1C6E, 0x1, 0x1, 0},
+ {0x1C9E, 0x1, 0x1, 0},
+ {0x1C8A, 0x1, 0x1, 0},
+ {0x1B90, 0x1, 0x1, 0},
+ {0x1CB2, 0x1, 0x1, 0},
+ {0x1D34, 0x1, 0x1, 0},
+ {0x1D34, 0x1, 0x1, 0},
+ {0x1A9E, 0x1, 0x1, 1},
+ {0x1AA4, 0x1, 0x1, 1},
+ {0x1AB2, 0x1, 0x1, 1},
+ {0x1AB8, 0x1, 0x1, 1},
+ {0x1AC6, 0x1, 0x1, 1},
+ {0x1ACC, 0x1, 0x1, 1},
+ {0x1ADA, 0x1, 0x1, 0},
+ {0x1AEE, 0x1, 0x1, 0},
+ {0x1C0A, 0x1, 0x1, 2},
+ {0x1C10, 0x0, 0x1, 2},
+ {0x1B0A, 0x1, 0x1, 1},
+ {0x1B10, 0x1, 0x1, 1},
+ {0x1CC6, 0x1, 0x1, 0},
+ {0x1CDA, 0x1, 0x1, 0},
+ {0x1B1E, 0x1, 0x1, 0},
+ {0x1D4A, 0x1, 0x1, 0},
+ {0x1D5E, 0x1, 0x1, 0},
+ {0x1D0A, 0x1, 0x1, 0},
+ {0x1B32, 0x1, 0x1, 1},
+ {0x1B38, 0x1, 0x1, 1},
+ {0x1B32, 0x1, 0x1, 1},
+ {0x1B38, 0x1, 0x1, 1},
+ {0x1DA0, 0x1, 0x1, 1},
+ {0x1DA6, 0x0, 0x1, 1},
+
+ /* Deep idle setting */
+ {0x1390, 0x1, 0x1, 0},
+ {0x1490, 0x1, 0x1, 0},
+ {0x1510, 0x1, 0x1, 0},
+ {0x1590, 0x1, 0x1, 0},
+ {0x1690, 0x1, 0x1, 0},
+ {0x1710, 0x1, 0x1, 3},
+ {0x1716, 0x1, 0x1, 3},
+ {0x1610, 0x1, 0x1, 3},
+ {0x1616, 0x1, 0x1, 3},
+ {0x1410, 0x1, 0x1, 0},
+ {0x1BD0, 0x1, 0x1, 0},
+ {0x1BAE, 0x1, 0x1, 3},
+ {0x1BB4, 0x1, 0x1, 3},
+ {0x1B4E, 0x1, 0x1, 0},
+ {0x1A8A, 0x1, 0x1, 3},
+ {0x1A90, 0x1, 0x1, 3},
+ {0x1C1E, 0x1, 0x1, 2},
+ {0x1C24, 0x0, 0x1, 2},
+ {0x1C32, 0x1, 0x1, 2},
+ {0x1C38, 0x0, 0x1, 2},
+ {0x1C46, 0x1, 0x1, 0},
+ {0x1D1E, 0x1, 0x1, 0},
+ {0x1D1E, 0x1, 0x1, 0},
+ {0x1D8A, 0x1, 0x1, 0},
+ {0x1C5A, 0x1, 0x1, 0},
+ {0x1C6E, 0x1, 0x1, 0},
+ {0x1C9E, 0x1, 0x1, 0},
+ {0x1C8A, 0x1, 0x1, 0},
+ {0x1B90, 0x1, 0x1, 0},
+ {0x1CB2, 0x1, 0x1, 0},
+ {0x1D34, 0x1, 0x1, 0},
+ {0x1D34, 0x1, 0x1, 0},
+ {0x1A9E, 0x1, 0x1, 3},
+ {0x1AA4, 0x1, 0x1, 3},
+ {0x1AB2, 0x1, 0x1, 3},
+ {0x1AB8, 0x1, 0x1, 3},
+ {0x1AC6, 0x1, 0x1, 0},
+ {0x1ADA, 0x1, 0x1, 0},
+ {0x1AEE, 0x1, 0x1, 0},
+ {0x1C0A, 0x1, 0x1, 2},
+ {0x1C10, 0x0, 0x1, 2},
+ {0x1B0A, 0x1, 0x1, 3},
+ {0x1B10, 0x1, 0x1, 3},
+ {0x1CC6, 0x1, 0x1, 0},
+ {0x1CDA, 0x1, 0x1, 0},
+ {0x1B1E, 0x1, 0x1, 0},
+ {0x1D4A, 0x1, 0x1, 0},
+ {0x1D5E, 0x1, 0x1, 0},
+ {0x1D0A, 0x1, 0x1, 0},
+ {0x1B32, 0x1, 0x1, 3},
+ {0x1B38, 0x1, 0x1, 3},
+ {0x1B32, 0x1, 0x1, 3},
+ {0x1B38, 0x1, 0x1, 3},
+ {0x1DA0, 0x1, 0x1, 3},
+ {0x1DA6, 0x0, 0x1, 3},
+};
+
+u16 pmic_read_interface(u16 reg, u16 mask, u16 shift)
+{
+ u16 rdata;
+
+ pwrap_read(reg, &rdata);
+ rdata &= (mask << shift);
+ rdata = (rdata >> shift);
+
+ return rdata;
+}
+
+void pmic_config_interface(u16 reg, u16 val, u16 mask, u16 shift)
+{
+ u16 old, new;
+
+ pwrap_read(reg, &old);
+
+ new = old & ~(mask << shift);
+ new |= (val << shift);
+ pwrap_write(reg, new);
+}
+
+void pmic_set_power_hold(bool enable)
+{
+ pmic_config_interface(PMIC_PWRHOLD, (enable) ? 1 : 0, 0x1, 0);
+}
+
+static void pmic_wdt_set(void)
+{
+ /* [5]=1, RG_WDTRSTB_DEB */
+ pmic_config_interface(
+ PMIC_TOP_RST_MISC_SET, 0x0020, 0xFFFF, 0);
+ /* [1]=0, RG_WDTRSTB_MODE */
+ pmic_config_interface(
+ PMIC_TOP_RST_MISC_CLR, 0x0002, 0xFFFF, 0);
+ /* [0]=1, RG_WDTRSTB_EN */
+ pmic_config_interface(PMIC_TOP_RST_MISC_SET, 0x0001, 0xFFFF, 0);
+}
+
+static void mt6358_init_setting(void)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(init_setting); i++)
+ pmic_config_interface(
+ init_setting[i].addr, init_setting[i].val,
+ init_setting[i].mask, init_setting[i].shift);
+}
+
+static void wk_sleep_voltage_by_ddr(void)
+{
+ u16 ddr_type;
+
+ ddr_type = pmic_read_interface(
+ PMIC_VM_MODE, 0x3, 0);
+
+ if (ddr_type == 0x2)
+ pmic_config_interface(PMIC_VDRAM1_VOSEL_SLEEP,
+ 0x3A, 0x7F, 0);
+}
+
+static void wk_power_down_seq(void)
+{
+ /* Write TMA KEY with magic number */
+ pmic_config_interface(PMIC_TOP_TMA_KEY, 0x9CA7, 0xFFFF, 0);
+ /* Set VPROC12 sequence to VA12 */
+ pmic_config_interface(PMIC_CPSDSA4, 0xA, 0x1F, 0);
+ pmic_config_interface(PMIC_TOP_TMA_KEY, 0x0, 0xFFFF, 0);
+}
+
+static void mt6358_lp_setting(void)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(lp_setting); i++)
+ pmic_config_interface(
+ lp_setting[i].addr, lp_setting[i].val,
+ lp_setting[i].mask, lp_setting[i].shift);
+}
+
+void mt6358_init(void)
+{
+ if (pwrap_init())
+ die("ERROR - Failed to initial pmic wrap!");
+
+ pmic_set_power_hold(true);
+ pmic_wdt_set();
+ mt6358_init_setting();
+ wk_sleep_voltage_by_ddr();
+ wk_power_down_seq();
+ mt6358_lp_setting();
+}
diff --git a/src/soc/mediatek/mt8183/soc.c b/src/soc/mediatek/mt8183/soc.c
index b51e7d4..9a51b90 100644
--- a/src/soc/mediatek/mt8183/soc.c
+++ b/src/soc/mediatek/mt8183/soc.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <soc/emi.h>
#include <soc/mmu_operations.h>
+#include <soc/mt6358.h>
#include <symbols.h>
@@ -27,6 +28,7 @@
static void soc_init(struct device *dev)
{
mtk_mmu_disable_l2c_sram();
+ mt6358_init();
}
static struct device_operations soc_ops = {
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic247faf73517f6512f9c9a69ba0254c749d68d4c
Gerrit-Change-Number: 29422
Gerrit-PatchSet: 1
Gerrit-Owner: Tristan Hsieh <tristan.shieh at mediatek.com>
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