[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/braswell/southcluster.c: Config i8254 timer

[Frans Hendriks (Code Review)]

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/29416


Change subject: src/soc/intel/braswell/southcluster.c: Config i8254 timer
......................................................................

src/soc/intel/braswell/southcluster.c: Config i8254 timer

ISA timer is not configured.
Add call setup_i8254().

BUG=N/A
TEST=Intel CherryHill CRB

Change-Id: If45c4975d147f28a456198ea290efba1c8b0464b
Signed-off-by: Frans Hendriks <fhendriks at eltan.com>
---
M src/soc/intel/braswell/southcluster.c
1 file changed, 3 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/29416/1

diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index ca87d63..a509a4e 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -27,6 +27,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
 #include <romstage_handoff.h>
 #include <soc/acpi.h>
 #include <soc/iomap.h>
@@ -192,6 +193,8 @@
 			read32(gen_pmcon1) & ~DIS_SLP_X_STRCH_SUS_UP);
 	}
 
+	/* Initialize i8254 timers */
+	setup_i8254();
 }
 
 /*

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If45c4975d147f28a456198ea290efba1c8b0464b
Gerrit-Change-Number: 29416
Gerrit-PatchSet: 1
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
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