[coreboot-gerrit] Change in coreboot[master]: cpu/intel/cache_as_ram_ht.inc: Compute the #var_mtrr during runtime

Arthur Heymans (Code Review) gerrit at coreboot.org
Wed May 30 20:28:55 CEST 2018


Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/26705


Change subject: cpu/intel/cache_as_ram_ht.inc: Compute the #var_mtrr during runtime
......................................................................

cpu/intel/cache_as_ram_ht.inc: Compute the #var_mtrr during runtime

When clearing all MTRR, compute the amount of variable MTRR's during
runtime instead of hardcoding it.

Change-Id: I51bd5ba3072837d64b46cd64cf609efc160e80fb
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/cpu/intel/car/cache_as_ram_ht.inc
1 file changed, 38 insertions(+), 26 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/26705/1

diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index e716caf..0eb58d1 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -39,21 +39,32 @@
 	andl	$LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR, %eax
 	jz	ap_init
 
-	/* Zero out all fixed range and variable range MTRRs.
-	 * For hyper-threaded CPUs these are shared.
-	 */
-	movl	$mtrr_table, %esi
-	movl	$((mtrr_table_end - mtrr_table) >> 1), %edi
-	xorl	%eax, %eax
-	xorl	%edx, %edx
-clear_mtrrs:
-	movw	(%esi), %bx
-	movzx	%bx, %ecx
-	wrmsr
-	add	$2, %esi
-	dec	%edi
-	jnz	clear_mtrrs
+	/* Clear/disable fixed MTRRs */
+	mov	$fixed_mtrr_list_size, %ebx
+	xor	%eax, %eax
+	xor	%edx, %edx
 
+clear_fixed_mtrr:
+	add	$-2, %ebx
+	movzwl	fixed_mtrr_list(%ebx), %ecx
+	wrmsr
+	jnz	clear_fixed_mtrr
+
+	/* Figure put how many MTRRs we have, and clear them out */
+	mov	$MTRR_CAP_MSR, %ecx
+	rdmsr
+	movzb	%al, %ebx		/* Number of variable MTRRs */
+	mov	$MTRR_PHYS_BASE(0), %ecx
+	xor	%eax, %eax
+	xor	%edx, %edx
+
+clear_var_mtrr:
+	wrmsr
+	inc	%ecx
+	wrmsr
+	inc	%ecx
+	dec	%ebx
+	jnz	clear_var_mtrr
 	post_code(0x21)
 
 	/* Configure the default memory type to uncacheable. */
@@ -452,15 +463,16 @@
 	hlt
 	jmp	.Lhlt
 
-mtrr_table:
-	/* Fixed MTRRs */
-	.word 0x250, 0x258, 0x259
-	.word 0x268, 0x269, 0x26A
-	.word 0x26B, 0x26C, 0x26D
-	.word 0x26E, 0x26F
-	/* Variable MTRRs */
-	.word 0x200, 0x201, 0x202, 0x203
-	.word 0x204, 0x205, 0x206, 0x207
-	.word 0x208, 0x209, 0x20A, 0x20B
-	.word 0x20C, 0x20D, 0x20E, 0x20F
-mtrr_table_end:
+fixed_mtrr_list:
+	.word	MTRR_FIX_64K_00000
+	.word	MTRR_FIX_16K_80000
+	.word	MTRR_FIX_16K_A0000
+	.word	MTRR_FIX_4K_C0000
+	.word	MTRR_FIX_4K_C8000
+	.word	MTRR_FIX_4K_D0000
+	.word	MTRR_FIX_4K_D8000
+	.word	MTRR_FIX_4K_E0000
+	.word	MTRR_FIX_4K_E8000
+	.word	MTRR_FIX_4K_F0000
+	.word	MTRR_FIX_4K_F8000
+fixed_mtrr_list_size = . - fixed_mtrr_list

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I51bd5ba3072837d64b46cd64cf609efc160e80fb
Gerrit-Change-Number: 26705
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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