[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Swap PCI devfn resides in same PCI device

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26479 )

Change subject: soc/intel/skylake: Swap PCI devfn resides in same PCI device
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Patch Set 4:

(9 comments)

https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c
File src/soc/intel/skylake/chip_fsp20.c:

https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@73
PS4, Line 73: static void pcie_update_device_tree(struct pcie_entry *pcie_rp_group, int pci_groups)
line over 80 characters


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@93
PS4, Line 93: 		 * Increase funtion by 1.
'funtion' may be misspelled - perhaps 'function'?


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@97
PS4, Line 97: 		for (i = 1; i < pcie_rp_group[group].func_count; i++, devfn += inc) {
line over 80 characters


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@102
PS4, Line 102: 			/* Found the first enabled device in a given dev number */
line over 80 characters


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@103
PS4, Line 103: 			printk(BIOS_INFO, "PCI func %d was swapped to func 0.\n", i);
line over 80 characters


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@127
PS4, Line 127: 	else if (id_mask == (PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1 & ~0xf)) {
else should follow close brace '}'


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@132
PS4, Line 132: 	else if (id_mask == (PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP1 & ~0xf)) {
else should follow close brace '}'


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@137
PS4, Line 137: 	else {
else should follow close brace '}'


https://review.coreboot.org/#/c/26479/4/src/soc/intel/skylake/chip_fsp20.c@138
PS4, Line 138: 		printk(BIOS_ERR, "[BUG] PCIE Root Port id 0x%x is not found\n", id);
line over 80 characters



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ibbc5d6e979977011f5904c8bd4b2f1be16bd23dc
Gerrit-Change-Number: 26479
Gerrit-PatchSet: 4
Gerrit-Owner: Gaggery Tsai <gaggery.tsai at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai at intel.com>
Gerrit-Reviewer: Kane Chen <kane.chen at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 29 May 2018 20:10:30 +0000
Gerrit-HasComments: Yes
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