[coreboot-gerrit] Change in coreboot[master]: mb/lippert: Get rid of whitespace before tab
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Mon May 28 13:50:21 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26631
Change subject: mb/lippert: Get rid of whitespace before tab
......................................................................
mb/lippert: Get rid of whitespace before tab
Change-Id: I52fe5a67e6b914426943c3499904e0546c3ea623
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/mainboard/lippert/frontrunner-af/dsdt.asl
M src/mainboard/lippert/toucan-af/dsdt.asl
2 files changed, 36 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/26631/1
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index f189106..ddc3e2c 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -228,9 +228,9 @@
PWMK, 1,
PWNS, 1,
- /* Offset(0x61), */ /* Options_1 */
- /* ,7, */
- /* R617,1, */
+ /* Offset(0x61), */ /* Options_1 */
+ /* ,7, */
+ /* R617,1, */
Offset(0x65), /* UsbPMControl */
, 4,
@@ -828,7 +828,7 @@
/* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ * Store(0,\_SB.PWDE)
*}
*/
@@ -843,13 +843,13 @@
* used, so it could be removed.
*
*
- * \_GTS OEM Going To Sleep method
+ * \_GTS OEM Going To Sleep method
*
- * Entry:
- * Arg0=The value of the sleeping state S1=1, S2=2
+ * Entry:
+ * Arg0=The value of the sleeping state S1=1, S2=2
*
- * Exit:
- * -none-
+ * Exit:
+ * -none-
*
* Method(\_GTS, 1) {
* DBGO("\\_GTS\n")
@@ -1016,7 +1016,7 @@
/* PCIe HotPlug event */
/* Method(_L0F) {
- * DBGO("\\_GPE\\_L0F\n")
+ * DBGO("\\_GPE\\_L0F\n")
* }
*/
@@ -1039,19 +1039,19 @@
/* GPM0 SCI event - Moved to USB.asl */
/* Method(_L13) {
- * DBGO("\\_GPE\\_L13\n")
+ * DBGO("\\_GPE\\_L13\n")
* }
*/
/* GPM1 SCI event - Moved to USB.asl */
/* Method(_L14) {
- * DBGO("\\_GPE\\_L14\n")
+ * DBGO("\\_GPE\\_L14\n")
* }
*/
/* GPM2 SCI event - Moved to USB.asl */
/* Method(_L15) {
- * DBGO("\\_GPE\\_L15\n")
+ * DBGO("\\_GPE\\_L15\n")
* }
*/
@@ -1063,7 +1063,7 @@
/* GPM8 SCI event - Moved to USB.asl */
/* Method(_L17) {
- * DBGO("\\_GPE\\_L17\n")
+ * DBGO("\\_GPE\\_L17\n")
* }
*/
@@ -1080,7 +1080,7 @@
/* GPM4 SCI event - Moved to USB.asl */
/* Method(_L19) {
- * DBGO("\\_GPE\\_L19\n")
+ * DBGO("\\_GPE\\_L19\n")
* }
*/
@@ -1111,7 +1111,7 @@
/* GPIO2 or GPIO66 SCI event */
/* Method(_L1E) {
- * DBGO("\\_GPE\\_L1E\n")
+ * DBGO("\\_GPE\\_L1E\n")
* }
*/
@@ -1121,7 +1121,7 @@
* }
*/
- } /* End Scope GPE */
+ } /* End Scope GPE */
#include "acpi/usb.asl"
@@ -1497,7 +1497,7 @@
0xF300 /* length */
)
- Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
+ Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
#if 0
Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */
Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS) /* BIOS ROM area */
diff --git a/src/mainboard/lippert/toucan-af/dsdt.asl b/src/mainboard/lippert/toucan-af/dsdt.asl
index f74a44d..40e42ce 100644
--- a/src/mainboard/lippert/toucan-af/dsdt.asl
+++ b/src/mainboard/lippert/toucan-af/dsdt.asl
@@ -228,9 +228,9 @@
PWMK, 1,
PWNS, 1,
- /* Offset(0x61), */ /* Options_1 */
- /* ,7, */
- /* R617,1, */
+ /* Offset(0x61), */ /* Options_1 */
+ /* ,7, */
+ /* R617,1, */
Offset(0x65), /* UsbPMControl */
, 4,
@@ -827,7 +827,7 @@
/* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ * Store(0,\_SB.PWDE)
*}
*/
@@ -842,13 +842,13 @@
* used, so it could be removed.
*
*
- * \_GTS OEM Going To Sleep method
+ * \_GTS OEM Going To Sleep method
*
- * Entry:
- * Arg0=The value of the sleeping state S1=1, S2=2
+ * Entry:
+ * Arg0=The value of the sleeping state S1=1, S2=2
*
- * Exit:
- * -none-
+ * Exit:
+ * -none-
*
* Method(\_GTS, 1) {
* DBGO("\\_GTS\n")
@@ -1015,7 +1015,7 @@
/* PCIe HotPlug event */
/* Method(_L0F) {
- * DBGO("\\_GPE\\_L0F\n")
+ * DBGO("\\_GPE\\_L0F\n")
* }
*/
@@ -1038,19 +1038,19 @@
/* GPM0 SCI event - Moved to USB.asl */
/* Method(_L13) {
- * DBGO("\\_GPE\\_L13\n")
+ * DBGO("\\_GPE\\_L13\n")
* }
*/
/* GPM1 SCI event - Moved to USB.asl */
/* Method(_L14) {
- * DBGO("\\_GPE\\_L14\n")
+ * DBGO("\\_GPE\\_L14\n")
* }
*/
/* GPM2 SCI event - Moved to USB.asl */
/* Method(_L15) {
- * DBGO("\\_GPE\\_L15\n")
+ * DBGO("\\_GPE\\_L15\n")
* }
*/
@@ -1062,7 +1062,7 @@
/* GPM8 SCI event - Moved to USB.asl */
/* Method(_L17) {
- * DBGO("\\_GPE\\_L17\n")
+ * DBGO("\\_GPE\\_L17\n")
* }
*/
@@ -1079,7 +1079,7 @@
/* GPM4 SCI event - Moved to USB.asl */
/* Method(_L19) {
- * DBGO("\\_GPE\\_L19\n")
+ * DBGO("\\_GPE\\_L19\n")
* }
*/
@@ -1110,7 +1110,7 @@
/* GPIO2 or GPIO66 SCI event */
/* Method(_L1E) {
- * DBGO("\\_GPE\\_L1E\n")
+ * DBGO("\\_GPE\\_L1E\n")
* }
*/
@@ -1120,7 +1120,7 @@
* }
*/
- } /* End Scope GPE */
+ } /* End Scope GPE */
#include "acpi/usb.asl"
@@ -1495,7 +1495,7 @@
0xF300 /* length */
)
- Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
+ Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
#if 0
Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */
Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS) /* BIOS ROM area */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I52fe5a67e6b914426943c3499904e0546c3ea623
Gerrit-Change-Number: 26631
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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