[coreboot-gerrit] Change in coreboot[master]: cpu/intel: Use postcar_frame_add_romcache()

[Nico Huber (Code Review)]

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/26578


Change subject: cpu/intel: Use postcar_frame_add_romcache()
......................................................................

cpu/intel: Use postcar_frame_add_romcache()

Change-Id: I432b38114fa381f2b38e61b69fe4f1c7c1306da9
Signed-off-by: Nico Huber <nico.h at gmx.de>
---
M src/cpu/intel/car/romstage.c
1 file changed, 1 insertion(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/26578/1

diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 03a94ee..09cd653 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -74,8 +74,7 @@
 	postcar_frame_init_lowmem(&pcf);
 
 	/* Cache the ROM as WP just below 4GiB. */
-	postcar_frame_add_mtrr(&pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE,
-		MTRR_TYPE_WRPROT);
+	postcar_frame_add_romcache(&pcf, MTRR_TYPE_WRPROT);
 
 	/* Cache RAM as WB from 0 -> CACHE_TMP_RAMTOP. */
 	postcar_frame_add_mtrr(&pcf, 0, CACHE_TMP_RAMTOP, MTRR_TYPE_WRBACK);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I432b38114fa381f2b38e61b69fe4f1c7c1306da9
Gerrit-Change-Number: 26578
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
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