[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variants/nami: Revise WLAN driver to port 1

[Gaggery Tsai (Code Review)]

Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/26479


Change subject: mb/google/poppy/variants/nami: Revise WLAN driver to port 1
......................................................................

mb/google/poppy/variants/nami: Revise WLAN driver to port 1

This patch revises the Wi-Fi driver from port 4 to port 1. The Wi-Fi
card is physically on PCIe port 4 but it will be function swapped to
port 1 after FSP silicon initialization.

BUG=b:80105785
BRANCH=None
TEST=cat /sys/firmware/acpi/tables/DSDT > /tmp/dsdt.dat &
     iasl -d dsdt.dat to ensure Wi-Fi related resrouce is in SSDT.

Change-Id: Ibbc5d6e979977011f5904c8bd4b2f1be16bd23dc
Signed-off-by: Gaggery Tsai <gaggery.tsai at intel.com>
---
M src/mainboard/google/poppy/variants/nami/devicetree.cb
1 file changed, 6 insertions(+), 5 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/26479/1

diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 5e2575f..f7e130f 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -391,15 +391,16 @@
 		device pci 19.0 on  end # UART #2
 		device pci 19.1 off end # I2C #5
 		device pci 19.2 off end # I2C #4
-		device pci 1c.0 on  end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 on
+		device pci 1c.0 on
 			chip drivers/intel/wifi
 				register "wake" = "GPE0_DW2_22" # Wake pin = GPP_E22
 				device pci 00.0 on end
 			end
-		end # PCI Express Port 4
+		end # PCI Express Port 1
+		device pci 1c.1 off end # PCI Express Port 2
+		device pci 1c.2 off end # PCI Express Port 3
+		# Port 4 for WLAN, will be swapped to port 1 after FSPs
+		device pci 1c.3 on end # PCI Express Port 4
 		device pci 1c.4 on end # PCI Express Port 5
 		device pci 1c.5 off end # PCI Express Port 6
 		device pci 1c.6 off end # PCI Express Port 7

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibbc5d6e979977011f5904c8bd4b2f1be16bd23dc
Gerrit-Change-Number: 26479
Gerrit-PatchSet: 1
Gerrit-Owner: Gaggery Tsai <gaggery.tsai at intel.com>
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